PIC12F1822-I/MF Microchip Technology, PIC12F1822-I/MF Datasheet - Page 117
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PIC12F1822-I/MF
Manufacturer Part Number
PIC12F1822-I/MF
Description
IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets
1.PIC12F1822T-ISN.pdf
(404 pages)
2.PIC12F1822T-ISN.pdf
(10 pages)
3.PIC12F1822-IMF.pdf
(398 pages)
Specifications of PIC12F1822-I/MF
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Cpu Speed
32MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
3.5KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F1822-I/MF
Manufacturer:
ALLEGRO
Quantity:
1 001
Part Number:
PIC12F1822-I/MF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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12.0
Depending on the device selected and peripherals
enabled, there are up to two ports available. In general,
when a peripheral is enabled, that pin may not be used
as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRISx registers (data direction register)
• PORTx registers (reads the levels on the pins of
• LATx registers (output latch)
The Data Latch (LATx registers) is useful for
read-modify-write operations on the value that the I/O
pins are driving.
A write operation to the LATx register has the same
affect as a write to the corresponding PORTx register.
A read of the LATx register reads of the values held in
the I/O PORT latches, while a read of the PORTx
register reads the actual I/O pin value.
Ports with analog functions also have an ANSELx
register which can disable the digital input and save
power. A simplified model of a generic I/O port, without
the interfaces to other peripherals, is shown in
Figure 12-1.
FIGURE 12-1:
2010 Microchip Technology Inc.
To peripherals
Write LATx
Write PORTx
Data Bus
the device)
Read PORTx
I/O PORTS
Data Register
D
CK
Read LATx
ANSELx
GENERIC I/O PORT
OPERATION
Q
TRISx
V
V
DD
SS
PIC12F/LF1822/16F/LF1823
I/O pin
Preliminary
12.1
The Alternate Pin Function Control (APFCON)
registers are used to steer specific peripheral input and
output functions between different pins. The APFCON
registers are shown in Register 12-1. For this device
family, the following functions can be moved between
different pins.
• RX/DT/TX/CK
• SDO
• SS (Slave Select)
• T1G
• P1B
• CCP1/P1A
These bits have no effect on the values of any TRIS
register. PORT and TRIS overrides will be routed to the
correct pin. The unselected pin will be unaffected.
Alternate Pin Function
DS41413A-page 117
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