PIC12F1822-I/MF Microchip Technology, PIC12F1822-I/MF Datasheet - Page 303

• Manufacturer Part Number: PIC12F1822-I/MF
• Description: IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-I/MF

• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Core Size: 8 Bit
• Program Memory Size: 3.5KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 25-12:
TABLE 25-8:
 2010 Microchip Technology Inc.
BAUDCON
INTCON
PIE1
PIR1
RCREG
RCSTA
SPBRGL
SPBRGH
TRISC
TXSTA
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Synchronous Master Reception.
Note 1:
(SCKP = 0)
(SCKP = 1)
(Interrupt)
Note:
TX/CK pin
TX/CK pin
CREN bit
SREN bit
bit SREN
RCIF bit
RCREG
Name
RX/DT
Write to
Read
(1)
pin
*
Page provides register information.
PIC16F/LF1823 only.
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
‘0’
TMR1GIE
TMR1GIF
ABDOVF
BRG15
CSRC
SPEN
BRG7
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
RECEPTION
GIE
—
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
BRG14
bit 0
RCIDL
BRG6
ADIE
PEIE
ADIF
Bit 6
RX9
TX9
—
bit 1
TMR0IE
TRISC5
BRG13
SREN
BRG5
TXEN
RCIE
RCIF
Bit 5
—
EUSART Receive Data Register
PIC12F/LF1822/16F/LF1823
bit 2
TRISC4
Preliminary
BRG12
CREN
SCKP
BRG4
SYNC
INTE
Bit 4
TXIE
TXIF
bit 3
TRISC3
SSP1IE
SSP1IF
ADDEN
SENDB
BRG16
BRG11
IOCIE
BRG3
Bit 3
bit 4
TMR0IF
CCP1IE
CCP1IF
TRISC2
BRG10
BRGH
FERR
BRG2
Bit 2
—
bit 5
TMR2IE
TMR2IF
TRISC1
OERR
BRG1
BRG9
TRMT
WUE
Bit 1
INTF
bit 6
TMR1IE
TMR1IF
TRISC0
ABDEN
bit 7
IOCIF
RX9D
BRG0
BRG8
TX9D
Bit 0
DS41413A-page 303
Register
on Page
284*
291*
291*
290
289
125
288
89
90
92
‘0’