PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 294

• Manufacturer Part Number: PIC18F85K22-I/PT
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F85K22-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 69
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 64MHz
• No. Of Timers: 8
• Core Size: 8 Bit
• Program Memory Size: 32KB
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87K22 FAMILY
REGISTER 21-5:
DS39960D-page 294
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
GCEN
R/W-0
2:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
If the I
(or writes to the SSPxBUF are disabled).
GCEN: General Call Enable bit
Unused in Master mode.
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (Master Receive mode only)
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits ACKDT data bit.
0 = Acknowledge sequence is Idle
RCEN: Receive Enable bit (Master Receive mode only)
1 = Enables Receive mode for I
0 = Receive is Idle
PEN: Stop Condition Enable bit
1 = Initiates Stop condition on SDAx and SCLx pins. Automatically cleared by hardware.
0 = Stop condition is Idle
RSEN: Repeated Start Condition Enable bit
1 = Initiates Repeated Start condition on SDAx and SCLx pins. Automatically cleared by hardware.
0 = Repeated Start condition is Idle
SEN: Start Condition Enable bit
1 = Initiates Start condition on SDAx and SCLx pins. Automatically cleared by hardware.
0 = Start condition is Idle
ACKSTAT
2
R/W-0
C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
Automatically cleared by hardware.
SSPxCON2: MSSPx CONTROL REGISTER 2 (I
W = Writable bit
‘1’ = Bit is set
ACKDT
R/W-0
(1)
ACKEN
(2)
(2)
2
C™
R/W-0
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
RCEN
R/W-0
(2)
(2)
(1)
2
PEN
R/W-0
C™ MASTER MODE)
 2009-2011 Microchip Technology Inc.
(2)
x = Bit is unknown
RSEN
R/W-0
(2)
SEN
R/W-0
(2)
bit 0