AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 109
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.9.6
1.9.7
Datasheet
CC - Class Code
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the device programming interface information related to the
Sub-Class Code and Base Class Code definition for the IGD. This register also contains
the Base Class Code and the function sub-class in relation to the Base Class Code.
CLS - Cache Line Size
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The IGD does not support this register as a PCI slave.
23:16
15:8
7:0
7:0
Bit
Bit
Access
Access
RO
RO
RO
RO
Default
Default
Value
Value
03h
00h
00h
00h
00h: Hardwired as a Display controller.
Base Class Code (BCC):
class code for the CPU Uncore. This code has
the value 03h, indicating a Display Controller.
Sub-Class Code (SUBCC):
GGC register, GMS and IVD fields.
Programming Interface (PI):
Cache Line Size (CLS):
compliant master does not use the Memory
Write and Invalidate command and, in general,
does not perform operations based on cache line
size.
This is an 8-bit value that indicates the base
Value will be determined based on Device 0
This field is hardwired to 0s. The IGD as a PCI
00h: VGA compatible
80h: Non VGA (GMS = "0000" or IVD = "1")
0/2/0/PCI
9-Bh
030000h
24 bits
0/2/0/PCI
Ch
00h
8 bits
RO;
RO;
Description
Description
109
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