AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 88
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1.7.8
88
DMIVC1RCAP - DMI VC1 Resource Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:24
22:16
14:8
7:0
Bit
Bit
23
15
0
Access
Access
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
00h
00h
00h
01h
0b
0b
1b
RST/
RST/
PWR
PWR
Core
Core
Core
Core
Core
Core
Core
0/0/0/DMIBAR
1C-1Fh
00008001h
32 bits
RO;
0: Transactions with or without the No Snoop bit
set within the TLP header are allowed on this VC.
1: When Set, any transaction for which the No
Snoop attribute is applicable but is not Set
within the TLP Header will be rejected as an
Unsupported Request.
Control initialization. It is set by default on
Reset, as well as whenever the corresponding
Virtual Channel is Disabled or the Link is in the
DL_Down state.
successfully exits the FC_INIT2 state.
Requirement: Before using a Virtual Channel,
software must check whether the VC
Negotiation Pending fields for that Virtual
Channel are cleared in both Components on a
Link.
Reserved ()
Reserved for Port Arbitration Table Offset
(RESERVED ()
Reserved (RESERVED ()
Reserved for Maximum Time Slots
(RESERVED ())
Reject Snoop Transactions (REJSNPT):
Reserved ()
Port Arbitration Capability (PAC):
supported arbitration scheme for this VC is non-
configurable hardware-fixed.
Having only bit 0 set indicates that the only
Processor Configuration Registers
Description
Description
It is cleared when the link
Datasheet
BIOS
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