AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 149
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.10.25
1.10.26
Datasheet
PMCAPID - Mirror of Fun 0 Power Management
Capabilities ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is a mirror of function 0 with the same R/W attributes. The hardware
implements a single physical register common to both functions 0 and 1.
PMCAP - Mirror of Fun 0 Power Management Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is a Mirror of Function 0 with the same read/write attributes. The
hardware implements a single physical register common to both functions 0 and 1.
15:11
15:8
7:0
8:6
Bit
Bit
10
9
Access
Access
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
000b
00h
01h
00h
0b
0b
Next Capability Pointer (NEXT_PTR):
This contains a pointer to next item in
capabilities list. This is the final capability in
the list and must be set to 00h.
Capability Identifier (CAP_ID):
SIG defines this ID is 01h for power
management.
PME Support (PMES):
the IGD may assert PME#. Hardwired to 0 to
indicate that the IGD does not assert the PME#
signal.
D2 Support (D2):
supported. This bit is hardwired to 0.
D1 Support (D1):
management state is not supported.
Reserved ():
This field indicates the power states in which
The D2 power management state is not
Hardwired to 0 to indicate that the D1 power
0/2/1/PCI
D0-D1h
0001h
16 bits
0/2/1/PCI
D2-D3h
0022h
16 bits
RO;
RO;
Description
Description
149
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