AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 81
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AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.6.16
Datasheet
PMSTS - Power Management Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is Reset by PWROK only.
31:9
7:1
Bit
8
0
Access
RWC/P
RWC/P
RO
RO
000000h
Default
Value
00h
0b
0b
RST/
PWR
Core
Core
Core
Core
0/0/0/MCHBAR
F14-F17h
00000000h
32 bits
RWC/P; RO;
Set by the PMunit whenever a ResetWarn is
received, and cleared by PWROK=0.
Set by power management hardware after
Channel 0 is placed in self refresh as a result of
a Power State or a Reset Warn sequence.
Reserved ()
Warm Reset Occurred (WRO):
BIOS Requirement: BIOS can check and clear
this bit whenever executing POST code. This
way BIOS knows that if the bit is set, then the
PMSTS bits [1:0] must also be set, and if not
BIOS needs to power-cycle the platform.
Reserved ()
Channel 0 in Self-Refresh (C0SR)
Cleared by Power management hardware
before starting Channel 0 self refresh exit
sequence initiated by a power management
exit.
Cleared by the BIOS by writing a "1" in a warm
reset (Reset# asserted while PWROKis
asserted) exit sequence.
0: Channel 0 not guaranteed to be in self
refresh.
1: Channel 0 in Self Refresh.
0: No Warm Reset occurred.
1: Warm Reset occurred.
Description
81
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