AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 43
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
Datasheet
25:3
2:1
Bit
27
26
0
RW/L/K
Access
RW/L
RW/L
RW/L
RO
000000h
Default
Value
00b
0b
0b
0b
RST/
PWR
Core
Core
Core
Core
Core
0: The PCIEXBAR register is disabled. Memory
read and write transactions proceed as if there were
no PCIEXBAR register. PCIEXBAR bits 35:26 are
R/W with no functionality behind them.
128MB Base Address Mask (128ADMSK):
Address (R/W) or part of the Address Mask (RO,
read 0b), depending on the value of bits 2:1 in
this register.
64MB Base Address Mask (64ADMSK):
Address (R/W) or part of the Address Mask (RO,
read 0b), depending on the value of bits 2:1 in
this register.
Reserved ()
Length (LENGTH):
This Field describes the length of this region.
Enhanced Configuration Space Region/Buses
Decoded
00:
decoded in the PCI Express Base Address Field
01:
decoded in the PCI Express Base Address Field.
10:
decoded in the PCI Express Base Address Field.
11:
PCIEXBAR Enable (PCIEXBAREN):
1: The PCIEXBAR register is enabled. Memory
read and write transactions whose address bits
35:26 match PCIEXBAR will be translated to
configuration reads and writes within the CPU
Uncore. These Translated cycles are routed as
shown in the table above.
This bit is either part of the PCI Express Base
This bit is either part of the PCI Express Base
256MB (buses 0-255). Bits 31:28 are
128MB (Buses 0-127). Bits 31:27 are
64MB (Buses 0-63). Bits 31:26 are
Reserved
Description
43
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