PIC12F1822-I/SN Microchip Technology, PIC12F1822-I/SN Datasheet - Page 212

• Manufacturer Part Number: PIC12F1822-I/SN
• Description: 3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 S
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-I/SN

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of I/o's: 6
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Embedded Interface Type: AUSART, EUSART, I2C, SPI
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Processor Series: PIC12F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC12F/LF1822/PIC16F/LF1823
24.4
The enhanced PWM mode generates a Pulse-Width
Modulation (PWM) signal on up to four different output
pins with up to 10 bits of resolution. The period, duty
cycle, and resolution are controlled by the following
registers:
• PR2 registers
• T2CON registers
• CCPR1L registers
• CCP1CON registers
The ECCP modules have the following additional PWM
registers which control Auto-shutdown, Auto-restart,
Dead-band Delay and PWM Steering modes:
• CCP1AS registers
• PSTR1CON registers
• PWM1CON registers
The enhanced PWM module can generate the following
four PWM Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM (PIC16F/LF1823 only)
• Single PWM with PWM Steering Mode
To select an Enhanced PWM Output mode, the P1M bits
of the CCP1CON register must be configured
appropriately.
FIGURE 24-5:
DS41413B-page 212
Note 1:
CCPR1H (Slave)
Duty Cycle Registers
Comparator
PWM (Enhanced Mode)
CCPR1L
PR2
TMR2
2:
Comparator
The 8-bit timer TMR1 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit time
base.
PIC16F/LF1823 only.
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer,
toggle PWM pin and
latch duty cycle
DC1B<1:0>
R
S
P1M<1:0>
Q
Preliminary
PWM1CON
Controller
Output
2
CCP1/P1A
P1C
P1D
P1B
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
bits
appropriately.
Figure 24-5
diagram of the Enhanced PWM module.
Table 24-9
Enhanced PWM modes.
4
CCP1M<3:0>
(2)
(2)
Note 1: The corresponding TRIS bit must be
CCP1M<3:0>
2: Clearing the CCP1CON register will
3: Any pin not used in the enhanced PWM
4: To
TRISx
TRISx
TRISx
TRISx
shows the pin assignments for various
cleared to enable the PWM output on the
CCP1 pin.
relinquish control of the CCP1 pin.
mode is available for alternate pin
functions, if applicable.
incomplete waveform when the PWM is
first enabled, the ECCP module waits
until the start of a new PWM period
before generating a PWM signal.
shows an example of a simplified block
prevent
in
 2010 Microchip Technology Inc.
the
the
CCP1/P1A
P1B
P1D
P1C
generation
CCP1CON
(2)
(2)
of
register
an