PIC12F1822-I/SN Microchip Technology, PIC12F1822-I/SN Datasheet - Page 364
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PIC12F1822-I/SN
Manufacturer Part Number
PIC12F1822-I/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12F1822-I/SN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
No. Of I/o's
6
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Embedded Interface Type
AUSART, EUSART, I2C, SPI
No. Of Pins
8
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Processor Series
PIC12F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F1822-I/SN
Manufacturer:
MICROCHIP
Quantity:
4 500
Company:
Part Number:
PIC12F1822-I/SN
Manufacturer:
MICROCHI
Quantity:
1 700
Part Number:
PIC12F1822-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 364 of 404
- Download datasheet (4Mb)
PIC12F/LF1822/PIC16F/LF1823
FIGURE 30-12:
FIGURE 30-13:
DS41413B-page 364
Note 1: If the A/D clock source is selected as RC, a time of T
Note 1: If the A/D clock source is selected as RC, a time of T
A/D Data
A/D CLK
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
BSF ADCON0, GO
ADRES
Sample
ADIF
ADIF
GO
Q4
GO
SLEEP instruction to be executed.
AD134
AD134
SLEEP instruction to be executed.
Q4
AD132
AD132
PIC12F/LF1822/16F/LF1823 A/D CONVERSION TIMING (NORMAL MODE)
PIC12F/LF1822/16F/LF1823 A/D CONVERSION TIMING (SLEEP MODE)
(T
OSC
(T
/2 + T
OSC
/2
CY
(1)
(1)
7
)
7
)
OLD_DATA
OLD_DATA
Sampling Stopped
6
6
Preliminary
AD131
AD131
Sampling Stopped
5
5
CY
CY
4
is added before the A/D clock starts. This allows the
is added before the A/D clock starts. This allows the
4
AD130
AD130
3
3
2
2
1
1
2010 Microchip Technology Inc.
0
0
NEW_DATA
1 T
NEW_DATA
DONE
CY
DONE
1 T
1 T
CY
1 T
CY
CY
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