P89LPC912FDH NXP Semiconductors, P89LPC912FDH Datasheet - Page 2

• Manufacturer Part Number: P89LPC912FDH
• Description: MCU 8BIT 80C51 1K FLASH, TSSOP14
• Manufacturer: NXP Semiconductors

Specifications of P89LPC912FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 12
• Program Memory Size: 1KB
• Ram Memory Size: 128Byte
• Cpu Speed: 18MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No. Of: RoHS Compliant

NXP Semiconductors
P89LPC912_913_914_5
Product data sheet
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Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
Low voltage reset (brownout detect) allows a graceful system shutdown when power
fails. May optionally be configured as an interrupt.
Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1 A (total power-down with voltage comparators disabled).
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent spurious
and incomplete resets. A software reset function is also available.
Configurable on-chip oscillator with frequency range options selected by user
programmed flash configuration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz (P89LPC912, P89LPC913).
Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
Programmable port output configuration options: quasi-bidirectional, open-drain,
push-pull, input-only.
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
Only power and ground connections are required to operate the P89LPC912/913/914
when internal reset option is selected.
Four interrupt priority levels.
Four keypad interrupt inputs.
Second data pointer.
Schmitt trigger port inputs.
Emulation support.
Rev. 05 — 28 September 2007
8-bit microcontrollers with two-clock 80C51 core
P89LPC912/913/914
© NXP B.V. 2007. All rights reserved.
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