SAK-C505CA-4EMCA Infineon Technologies, SAK-C505CA-4EMCA Datasheet - Page 35

IC, 8BIT MCU, 32K OTP, SMD

SAK-C505CA-4EMCA

Manufacturer Part Number
SAK-C505CA-4EMCA
Description
IC, 8BIT MCU, 32K OTP, SMD
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAK-C505CA-4EMCA

Core Size
8bit
No. Of I/o's
34
Program Memory Size
32KB
Ram Memory Size
256Byte
Cpu Speed
20MHz
Oscillator Type
External, Internal
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
MQFP
Controller Family/series
C500
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timer 2 Compare Modes
The compare function of a timer/register combination operates as follows : the 16-bit value stored
in a compare or compare/capture register is compared with the contents of the timer register; if the
count value in the timer register matches the stored value, an appropriate output signal is generated
at a corresponding port pin and an interrupt can be generated.
Compare Mode 0
In compare mode 0, upon matching the timer and compare register contents, the output signal
changes from low to high. lt goes back to a low level on timer overflow. As long as compare mode
0 is enabled, the appropriate output pin is controlled by the timer circuit only and writing to the port
will have no effect.
mode 0. The port latch is directly controlled by the timer overflow and compare match signals. The
input line from the internal bus and the write-to-latch line of the port latch are disconnected when
compare mode 0 is enabled.
Figure 12
Port Latch in Compare Mode 0
Data Sheet
Compare Register
Timer Register
Compare Reg.
Timer Circuit
Comparator
Circuit
16 Bit
16
Bit
Figure 12
Compare
Match
Overflow
Timer
shows a functional diagram of a port circuit when used in compare
Port Circuit
Internal
Bus
Write to
Latch
31
C505/C505C/C505A/C505CA
S
D
CLK
R
Latch
Port
Read Pin
Read Latch
Q
Q
V
DD
MCS02661
Port
Pin
12.00

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