CS5501-BS Cirrus Logic Inc, CS5501-BS Datasheet - Page 29

• Manufacturer Part Number: CS5501-BS
• Description: A/D Converter (A-D) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5501-BS

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 16 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 20-SOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SERIAL INTERFACE MODE SELECT
PIN DESCRIPTIONS
Clock Generator
CLKIN; CLKOUT -Clock In; Clock Out, Pins 3 and 2.
Serial Output I/O
MODE -Serial Interface Mode Select, Pin 1.
DRDY -Data Ready, Pin 18.
CS -Chip Select, Pin 16.
DS31F2
NEGATIVE ANALOG POWER
NEGATIVE DIGITAL POWER
A gate inside the CS5501/CS5503 is connected to these pins and can be used with a crystal or
ceramic resonator to provide the master clock for the device. Alternatively, an external (CMOS
compatible) clock can be input to the CLKIN pin as the master clock for the device. When not
in SLEEP mode, a master clock (CLKIN) should be present at all times.
Selects the operating mode of the serial port. If tied to VD- (-5V), the CS5501 will operate in
the UART-compatible AC mode for Asynchronous Communication. The SCLK pin will
operate as an input to set the data rate, and data will transmit formatted with one start and two
stop bits. If MODE is tied to DGND, the CS5501/CS5503 will operate in the SEC
(Synchronous External-Clocking) mode, with the SCLK pin operating as an input and the
output appearing MSB-first. If MODE is tied to VD+ (+5V), the CS5501/CS5503 will operate
in its SSC (Synchronous Self-Clocking) mode, with SCLK providing a serial clock output of
CLKIN/4 (25% duty-cycle).
DRDY goes low every 1024 cycles of CLKIN to indicate that new data has been placed in the
output port. DRDY goes high when all the serial port data is clocked out, when the serial port
is being updated with new data, when a calibration is in progress, or when SLEEP is low.
An input which can be enabled by an external device to gain control over the serial port of the
CS5501/CS5503.
SYSTEM CALIBRATION 1
VOLTAGE REFERENCE
ANALOG GROUND
DIGITAL GROUND
CLOCK OUT
ANALOG IN
CLOCK IN
* Pinout applies to both DIP and SOIC packages
CLKOUT
CLKIN
MODE
DGND
AGND
VREF
SC1
VD-
VA-
AIN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SDATA
SCLK
DRDY
SC2
CS
VD+
VA+
CAL
BP/UP
SLEEP
SERIAL DATA OUTPUT
SERIAL CLOCK INPUT/OUTPUT
DATA READY
SYSTEM CALIBRATION 2
CHIP SELECT
POSITIVE DIGITAL POWER
POSITIVE ANALOG POWER
CALIBRATE
BIPOLAR/UNIPOLAR SELECT
SLEEP
CS5501/CS5503
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