EP9307-CR Cirrus Logic Inc, EP9307-CR Datasheet - Page 289

• Manufacturer Part Number: EP9307-CR
• Description: IC,MICROPROCESSOR,32-BIT,CMOS,BGA,272PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-CR

• Rohs Compliant: NO
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 272-TFBGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: 598-1133 - KIT DEVELOPMENT EP9307 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1254

BLKDESTSTRT
DS785UM1
31
15
Default:
Mask:
Definition:
Bit Descriptions:
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x0000_0000
0xFFFF_FFFC
Block Source Word Address Start register
ADR:
NA:
0x8004_000C - Read/Write
0x0000_0000
0xFFFF_FFFC
Block Destination Word Address Start register
ADR:
NA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Address - Read/Write
The value in this field specifies the word address of the
SDRAM frame buffer location that contains the starting
pixel (of the first scan line) of the source image.
The ADR field and the PEL field in the
register together define the starting pixel’s address in the
SDRAM frame buffer of the source image.
Not Assigned - Not used, returns written value
Address - Read/Write
The value in this field specifies the word address of the
SDRAM frame buffer location that contains the starting
pixel (of the first scan line) of the destination image.
The ADR field and the SPEL field in the
“DESTPIXELSTRT”
pixel’s address in the SDRAM frame buffer of the
destination image.
Not Assigned - Not used, returns written value
ADR
24
8
ADR
23
7
22
6
register together define the starting
21
5
20
4
19
3
“SRCPIXELSTRT”
Graphics Accelerator
EP93xx User’s Guide
18
2
17
1
NA
16
8-25
0
8