CDB42438 Cirrus Logic Inc, CDB42438 Datasheet - Page 4

• Manufacturer Part Number: CDB42438
• Description: Eval Bd 108dB 6&8ch Multi-Chnl CODECs
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42438

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42438
• Primary Attributes: 6 Single-Ended and 2 Differential Analog Inputs and 8 Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: Graphic User Interface
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V to 12 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42438
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
• Other names: 598-1500

1. SYSTEM OVERVIEW
The CDB42438 evaluation board is an excellent means for evaluating the CS42438 CODEC. An-
alog and digital audio signal interfaces are provided, an FPGA used for easily configuring the
board and a 9-pin serial cable for use with the supplied Windows
The CDB42438 schematic set has been partitioned into 18 pages and is shown in Figures 8
through 25.
4
1.1
1.2
1.3
1.4
1.5
Power must be supplied to the evaluation board through the +5.0 V, +12.0 V and -12.0 V
binding posts. Jumper J1 connects the VA supply to a fixed +5.0 V or +3.3 V supply. VD, VLS
and VLC are all hard-tied to +3.3 V. All voltage inputs must be referenced to the single black
binding post ground connector (Figure 25 on page 47).
WARNING: Please refer to the CS42438 data sheet for allowable voltage levels.
The CS42438 requires careful attention to power supply and grounding arrangements to op-
timize performance. Figure 8 on page 30 provides an overview of the connections to the
CS42438. Figure 26 on page 48 shows the component placement. Figure 27 on page 49
shows the top layout. Figure 28 on page 50 shows the bottom layout. The decoupling capac-
itors are located as close to the CS42438 as possible. Extensive use of ground plane fill in
the evaluation board yields large reductions in radiated noise.
See “FPGA System Overview” on page 9 for a complete description of how the FPGA (Figure
12 on page 34) is used on the CDB42438.
A complete description of the CS42438 (Figure 8 on page 30) is included in the CS42438
product data sheet.
The required configuration settings of the CS42438 are made in its control port registers, ac-
cessible through the “CS42438” tab of the Cirrus Logic FlexGUI software.
Clock and data source selections are made in the control port of the FPGA, accessible
through the “FPGA” tab of the Cirrus Logic FlexGUI software. Refer to registers “CODEC
SDIN Control (address 02h)” on page 16 and “CODEC Clock Control (address 03h)” on
page 17 for configuration settings.
A complete description of the CS8406 transmitter (Figure 11 on page 33) and a discussion
of the digital audio interface are included in the CS8406 data sheet.
The CS8406 converts the PCM data generated by the CS42438 to the standard S/PDIF data
stream. The CS8406 operates in slave mode, accepting either a 128Fs or 256Fs master
Power
Grounding and Power Supply Decoupling
FPGA
CS42438 Audio CODEC
CS8406 Digital Audio Transmitter
®
configuration software.
CDB42438
DS646DB2