S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 203

• Manufacturer Part Number: S1D13700F01A100
• Description: Display Drivers LCD CONTROLLER
• Manufacturer: Epson

Specifications of S1D13700F01A100

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Package Type: TQFP
• Pin Count: 80
• Mounting: Surface Mount
• Operating Supply Voltage (min): 2.7V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

1: INTERFACING TO THE MOTOROLA MC68328 “DRAGONBALL” MICROPROCESSOR
Chip-Select Module
1.3 S1D13705 Host Bus Interface
Host Bus Pin Connection
5-2
The MC68328 can generate up to 16 chip select outputs, organized into four groups “A” through
“D”.
Each chip select group has a common base address register and address mask register, to set the base
address and block size of the entire group. In addition, each chip select within a group has its own
address compare and address mask register, to activate the chip select for a subset of the group’s
address block. Finally, each chip select may be individually programmed to control an 8 or 16-bit
device, and each may be individually programmed to generate from 0 through 6 wait states
internally, or allow the memory or peripheral device to terminate the cycle externally through use of
the standard MC68000 DTACK# signal.
Groups A and B can have a minimum block size of 64K bytes, so these are typically used to control
memory devices. Chip select A0 is active immediately after reset, so it is typically used to control a
boot EPROM device. Groups C and D have a minimum block size of 4K bytes, so they are well-
suited to controlling peripheral devices. Chip select D3 is associated with the MC68328 on-chip
PCMCIA control logic.
This section is a summary of the host bus interface modes available on the S1D13705 that may be
used to interface to the MC68328.
The S1D13705 implements a 16-bit interface to the host microprocessor which may operate in one
of several modes compatible with most of the popular embedded microprocessor families. The two
interface modes that may be used for the MC68328 are:
• Motorola MC68K #1 (using Upper Data Strobe/Lower Data Strobe).
• Generic #1 (Chip Select, plus individual Read Enable/Write Enable for each byte).
The following table shows the functions of each host bus interface signal.
For details on configuration, refer to the “S1D13705 Hardware Functional Specification” ,
document number X27A-A-001-01.
Pin Names
S1D13705
AB[15:1]
DB[15:0]
RD/WR#
RESET#
WAIT#
BCLK
WE1#
WE0#
AB0
RD#
CS#
BS#
Table 1-1 Host Bus Interface Pin Mapping
connect to IO V
connect to IO V
External Decode
MC68K #1
DTACK#
RESET#
A[15:1]
D[15:0]
UDS#
LDS#
R/W#
CLK
AS#
EPSON
DD
DD
External Decode
connect to V
Generic #1
RESET#
A[15:1]
D[15:0]
WAIT#
BCLK
WE1#
WE0#
RD1#
RD0#
A0
SS
S1D13705F00A APPLICATION NOTES
(X27A-G-007-01)