S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 201
S1D15206F00A200
Manufacturer Part Number
S1D15206F00A200
Description
LCD Drivers LCD DRIVER
Manufacturer
Epson
Datasheet
1.S1D15206F00A200.pdf
(612 pages)
Specifications of S1D15206F00A200
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
Part Number:
S1D15206F00A200
Manufacturer:
EPSON/爱普生
Quantity:
20 000
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Microprocessor Interface
Note 1
When interfacing to 8080-series microprocessors, RD is active-LOW. When interfacing to 6800-series microproces-
sors, they are active-HIGH.
Note 2
When interfacing to 8080-series microprocessors, WR is active-LOW. When interfacing to 6800-series microproces-
sors, It will be read mode when WR is high and It will be write mode when WR is LOW.
S1D15600/601/602 Series
7–6
WR (R/W)
CS1, CS2
D0 to D7
RD (E)
Name
RES
SCL
C86
P/S
A0
SI
I/O
I/O
I
I
I
I
I
I
I
I
I
Data inputs/outputs
Control/display data flag input. This is connected to the LSB
of the microprocessor address bus.
When LOW, the data on D0 to D7 is control data.
When HIGH, the data on D0 to D7 is display data.
Reset input. System is reset and initialized when LOW.
Chip select inputs. Data input/output is enabled when
CS1 is LOW and CS2 is HIGH.
Read enable input. See note. 1
Write enable input. See note. 2
Microprocessor interface select input. LOW when interfacing to
8080-series. HIGH when interfacing to 6800-series.
Serial data input
Serial clock input. Data is read on the rising edge of SCL and
converted to 8-bit parallel data.
Parallel/serial data input select
In serial mode, data cannot be read from the RAM, and D0 to D7,
HZ, RD and WR must be HIGH or LOW. In parallel mode, SI
and SCL must be HIGH or LOW.
HIGH
LOW
P/S
Operating
Parallel
mode
Serial
Chip select
CS1, CS2
CS1, CS2
EPSON
Description
Data/co-
mmand
A0
A0
D0 to D7
output
input/
Data
SI
Read/write
Write only
RD, WR
Serial
clock
SCL
—
Number of pins
8
1
1
2
1
1
1
1
1
1
Rev. 4.6
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