S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 447

• Manufacturer Part Number: S1D15206F00A200
• Description: LCD Drivers LCD DRIVER
• Manufacturer: Epson

Specifications of S1D15206F00A200

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev. 1.1a
Pin name
CLS
M/S
CL
FR
SYNC
DOF
IRS
HPM
I/O
I/O
I/O
I/O
I/O
I
I
I
I
Pin that selects the validity/invalidity of the built-in oscillator circuit
for display clocks.
When CLS=LOW, display clocks are input from the CL pin.
When the S1D15710 series is used for the master/slave
configuration, each of the CLS pins is set to the same level together.
Pin that selects the master/slave operation for the S1D15710 series.
The liquid crystal display system is synchronized by outputting the
timing signal required for the liquid crystal display for the master
operation and inputting the timing signal required for the liquid
crystal display for the slave operation.
According to the M/S and CLS states, the following table is given.
Display clock I/O pin
According to the M/S and CLS states, the following table is given.
When the S1D15710 series is used for the master/slave
configuration, each CL pin is connected.
Liquid crystal alternating current signal I/O pin
When the S1D15710 series is used for the master/slave
configuration, each FR pin is connected.
Liquid crystal synchronizing current signal I/O pin
When the S1D15710 series is used for the master/slave
configuration, each SYNC pin is connected.
Liquid crystal display blanking control pin
When the S1D15710 series is used for the master/slave
configuration, each DOF pin is connected.
V
the V
Valid only at master operation. The pin is fixed to HIGH or LOW at
slave operation.
Power supply control pin of the power supply circuit for liquid
crystal drive
Valid only at master operation. The pin is fixed to HIGH or LOW at
slave operation.
5
HIGH HIGH
CLS=HIGH: Built-in oscillator circuit valid
CLS=LOW: Built-in oscillator circuit invalid (external input)
M/S=HIGH: Master operation
M/S=LOW: Slave operation
LOW HIGH Invalid
M/S=HIGH: Output
M/S=LOW: Input
M/S=HIGH: Output
M/S=LOW: Input
M/S=HIGH: Output
M/S=LOW: Input
IRS=HIGH: Built-in resistor used
IRS=LOW: Built-in resistor not used. The V
HPM=HIGH: Normal mode
HPM=LOW: High power supply mode
M/S CLS Oscillator Power supply
HIGH HIGH Output
Display clock
Built-in oscillator circuit used
External input
LOW HIGH
M/S
voltage adjusting resistor selection pin
R
LOW
LOW
pin and stand-alone split resistor.
LOW
LOW
CLS
Invalid
Invalid
circuit
Valid
Input
Input
Input
CL
Invalid
Invalid
circuit
Description
Valid
Valid
EPSON
Output Output Output Output Output
Master
Input Output Output Output Output
Input Input Input Output Input
Input Input Input Output Input
HIGH
LOW
CL
FR
5
Slave
HIGH
LOW
voltage is adjusted by
SYNC FRS
DOF
S1D15710 Series
Number of
pins
1
1
1
1
2
1
1
1
11–9