S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 580

• Manufacturer Part Number: S1D15206F00A200
• Description: LCD Drivers LCD DRIVER
• Manufacturer: Epson

Specifications of S1D15206F00A200

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(4) Page address set
This command specifies the page address of the DDRAM (refer to Figure 5).
Specifying the page address and column address enables to access a desired bit of the DDRAM. After the last column
address (83H), page address incremented by +1 (refer to Figure 4). After the very last address (column = 83H, page =
8H), page address return to 0H.
Page address 8H is the DDRAM area dedicate to the indicator, and only D0 is valid for data change.
See the function explanation in “DDRAM and page/column address circuit”, for detail.
(5) Column address set
This command specifies the column address of the DDRAM (refer to Figure 5).
The column address is split into two sections (the upper 4-bits and lower 4-bits) when it is set (fundamentally, set
continuously).
Each time the DDRAM is accessed, the column address automatically increments by +1, making it possible for the MPU
to continuously access to the display data. After the last column address (83H) ,column address returns to 00H (refer
to Figure 4).
See the function explanation in “DDRAM and page/column address circuit”, for detail.
(6) Display start line address set
This command is used to specify the display start line address of the DDRAM (refer to Figure 5).
If the display start line address is changed dynamically using this command, then screen scrolling, page swapping can
be performed.
See the function explanation in “Line address circuit”, for detail.
Rev. 1.1a
A0
A0
A0
0
0
0
RD WR
RD WR
RD WR
E
E
E
1
1
1
R/W
R/W
R/W
0
0
0
D7
D7
A7
D7
1
0
0
0
0
1
1
0
D6
D6
A6
D6
0
0
0
0
0
0
0
1
D5
D5
A5
D5
1
0
0
0
0
0
0
0
0
0
1
1
D4
D4
A4
D4
1
1
0
0
0
0
0
0
0
0
0
1
1
D3
A3
D3
D3
A7
A3
EPSON
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
:
:
D2
D2
A6
A2
A2
D2
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
:
D1
D1
A1
D1
A5
A1
0
0
1
1
0
0
0
1
1
1
0
0
1
1
1
D0
D0
A0
D0
A4
A0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
1
Upper bit address
Lower bit address
Column address
Page address
Line address
3EH
3FH
00H
01H
02H
82H
83H
00H
01H
02H
0H
1H
2H
7H
8H
S1D15B01 Series
:
:
:
13–25