DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 102

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DS33X42DK

Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X42DK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 9-3. Example Functional Timing: DS2155 T1 Transmit-Side Boundary Timing
*
Figure 9-4. Example Functional Timing: DS2155 E1 Receive-Side Boundary Timing
*
Figure 9-5. Example Functional Timing: DS2155 T1 Receive-Side Boundary Timing
*
When interfacing to a Maxim T1/E1 transceiver as shown, the device should be programmed to invert the RCLK
input for each serial interface (LI.RCR1.RCLKINV = 1).
Because the first gapped transmit clock input edge after the transmit sync pulse is coincident with the start of the
first byte of user data, the transmit sync setup control bits must be configured for a sync pulse that arrives zero
clock cycles early ( LI.TCR.TS_SETUP[1:0] = 00).
Rev: 063008
Note DS2155 TCLK shown only for comparative purposes.
Note DS2155 RCLK shown only for comparative purposes.
Note DS2155 RCLK shown only for comparative purposes.
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
RCHCLK
RCHCLK
TCHCLK
TSYNC
RSYNC
RSYNC
RSER
RSER
TSER
RCLK
RCLK
TCLK
LSB
CHANNEL 32
TIME SLOT 24
X
MSB
TIME SLOT 1
LSB
LSB
MSB
F
MSB
FRAMING BYTE / CHANNEL 0
LSB MSB
TIME SLOT 1
TIME SLOT 2
LSB
MSB
LSB
MSB
CHANNEL 1
TIME SLOT 2
LSB MSB
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