DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 362

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DS33X42DK

Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X42DK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.10 JTAG Interface
Table 12-19. JTAG Interface
(VDD = 3.3V ±5%, T
Note 1: Clock can be stopped high or low.
Figure 12-22. JTAG Interface Timing
Rev: 063008
JTCLK Clock Period
JTCLK Clock High:Low Time (Note 1)
JTCLK to JTDI, JTMS Setup Time
JTCLK to JTDI, JTMS Hold Time
JTCLK to JTDO Delay
JTCLK to JTDO HIZ Delay
JTRST Width Low Time
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
JTCLK
PARAMETER
JTDI, JTMS,
JTRST
JTRST
JTD0
A
= -40°C to +85°C.)
t6
t7
t2
SYMBOL
t2 : t3
t1
t4
t5
t6
t7
t8
t4
t1
t5
MIN
100
50
2
2
2
2
t3
t8
1000
TYP
500
MAX
50
50
UNITS
362 of 375
ns
ns
ns
ns
ns
ns
ns

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