DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 223
DS33X42DK
Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33X42DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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197h:
Default
199h:
Default
Register Name:
Register Description:
Register Address:
196h:
Default
Bits 0-9: Bridge Filter Table Offset Address (BFTOA[10-1]) This register specifies the Offset Address for the
Bridge Table. The value specifies the most significant 10 bits of the SDRAM absolute address, resulting in a
granularity of 32,768 bytes per LSB.
Register Name:
Register Description:
Register Address:
198h:
Default
Bits 0-15: LAN Queue Overflow Status (LQOS[16-1]) This register indicates whether an overflow condition has
occurred on any of the LAN Queues since the last read of this register (one status bit per LAN Queue). This
register is reset each time it is read.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = No overflow condition detected
1 = At least one overflow condition detected since last read
BFTOA-8
LQOS-16
LQOS-8
Bit 15
Bit 15
Bit 7
Bit 7
0
0
0
0
-
BFTOA-7
LQOS-15
LQOS-7
Bit 14
Bit 14
Bit 6
Bit 6
0
0
0
0
-
AR.BFTOA
Bridge Filter Table Offset Address
196h
AR.LQOS
LAN Queue Overflow Status
198h
BFTOA-6
LQOS-14
LQOS-6
Bit 13
Bit 13
Bit 5
Bit 5
0
0
0
0
-
BFTOA-5
LQOS-13
LQOS-5
Bit 12
Bit 12
Bit 4
Bit 4
0
0
0
0
-
BFTOA-4
LQOS-12
LQOS-4
Bit 11
Bit 11
Bit 3
Bit 3
0
0
0
0
-
BFTOA-3
LQOS-11
LQOS-3
Bit 10
Bit 10
Bit 2
Bit 2
0
0
0
0
-
BFTOA-10
BFTOA-2
LQOS-10
LQOS-2
Bit 9
Bit 1
Bit 9
Bit 1
0
0
0
0
BFTOA-9
BFTOA-1
LQOS-9
LQOS-1
223 of 375
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0
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