DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 302
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
DS33X42DK
Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33X42DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 302 of 375
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
0100h:
Default
0101h:
Default
0102h:
Default
0103h:
Default
Bit 2: Reset on Read (ROR) – When set to 1, each management counter will reset to zero after a read access of
the least-significant byte. When equal to zero, the counters will only be reset by the CRST bit.
Bit 1: Counter Stop Rollover (CSR) – When set to 1, each counter will saturate at the maximum value and not roll
over. When equal to zero, each counter can rollover to zero after the maximum value is exceeded.
Bit 0: Counter Reset (CRST) – Set to 1 to initiate a reset of all management counters. Set to zero for normal
operation.
0 = Normal operation.
1 = Reset all management counters.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Reserved
Reserved
Reserved
Reserved
Bit 31
Bit 23
Bit 15
Bit 7
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 30
Bit 22
Bit 14
Bit 6
0
0
0
0
SU.MMCCTRL
MAC MANAGEMENT COUNTER CONTROL REGISTER
0100h (indirect)
Reserved
Reserved
Reserved
Reserved
Bit 29
Bit 21
Bit 13
Bit 5
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 28
Bit 20
Bit 12
Bit 4
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 27
Bit 19
Bit 11
Bit 3
0
0
0
0
Reserved
Reserved
Reserved
Bit 10
Bit 26
Bit 18
ROR
Bit 2
0
0
0
0
Reserved
Reserved
Reserved
Bit 25
Bit 17
CSR
Bit 9
Bit 1
0
0
0
0
Reserved
Reserved
Reserved
302 of 375
CRST
Bit 24
Bit 16
Bit 0
Bit 8
0
0
0
0
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