STEVAL-ISV009V1 STMicroelectronics, STEVAL-ISV009V1 Datasheet - Page 27

• Manufacturer Part Number: STEVAL-ISV009V1
• Description: Power Management Modules & Development Tools DUAL STG DC/AC CNVRT DEMO BRD
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-ISV009V1

• Design Resources: STEVAL-ISV009V1 BOM STEVAL-ISV009V1 Schematic
• Main Purpose: DC/DC, Step Up
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 36V
• Current - Output: -
• Voltage - Input: -
• Regulator Topology: Boost
• Frequency - Switching: -
• Board Type: Fully Populated
• Utilized Ic / Part: SPV1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AN3392
11
Table 3.
10,11,14,15,
12,13,24,25
22,23,26,26
9,16,21,28
(Psso36)
20,29,30
7,8,17-
Pin
34
31
32
33
35
36
1
2
3
4
5
6
Pin description
Pin description
SPI_DATA_OUT
SPI_DATA_IN
VIN_SNS_M
VOUT_SNS
VIN_SNS
SPI_CLK
PZ_OUT
OSC_IN
CB1…4
LX1…4
PGND
SGND
VREG
Name
VOUT
XCS
VIN
Ground Power ground
Ground Signal ground reference.
Supply DC input power supply unit.
Supply Booster output voltage
Type
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
Booster inductor connection.
External bootstrap capacitors have to be connected between these pins
and LXi
Chip select for SPI interface:
XCS = HIGH => SPI device is not active
XCS = LOW => SPI device is active
If this pin is left floating an internal resistor pulls the XCS pin up
switching the SPI off.
Input pin for SPI data flow. If not used, this pin should be connected to
ground.
Input pin for SPI clock signal. If not used, this pin should be connected to
ground.
Sense pin of input voltage. To be biased with a resistor divider between
VIN and SGND
Dedicated reference pin for voltage sensing.
This pin is used to compensate the feedback loop of the output voltage.
A series of resistor and capacitor has to be connected versus SGND.
Sense pin of output voltage. To be biased with a resistor divider between
VOUT and SGND
Pin for fine tuning of the switching frequency; to set the default value
(100 KHz) this pin has to be tied to VREG, otherwise for fine tuning it has
to be biased through a resistor versus SGND.
Power supply for internal low voltage circuitry; an external thank
capacitor has to be connected to this pin versus ground
Output pin for SPI data flow. If not used, this pin should be left floating.
Doc ID XXXXX Rev 1
Description
Pin description
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