LFE2-50E-D-EVN Lattice, LFE2-50E-D-EVN Datasheet - Page 12

• Manufacturer Part Number: LFE2-50E-D-EVN
• Description: MCU, MPU & DSP Development Tools LatticeMico32/DSP DEV BD/LatticeECP2
• Manufacturer: Lattice

Specifications of LFE2-50E-D-EVN

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 13. USB GPIO Connections (U0702) (Continued)
Table 14. Additional USB GPIO Connections (U0702, U0704, and U0704)
USB Configuration Connector
In addition to the ispDOWNLOAD connector, the FPGA and the MachXO can also be configured by a standard
USB connection. The USB target connector is wired to the Cypress CY7C68013A device (U0301).
This programming method requires the use of the ispVM System software. This can be downloaded from the Lat-
tice web site at: www.latticesemi.com/ispvm.
This connection will appear to the ispVM System software as if a regular USB-based ispDOWNLOAD cable is con-
nected to the PC.
The CY7C68013A in combination with the MachXO CPLD acts as a built-in ispDOWNLOAD cable. The MachXO is
connected to the ispDOWNLOAD Connector X3, and can program the LatticeECP2-50. The LatticeECP2-50 can
be programmed when DIP switch SW0302 is ‘off’ (pushed down).
Note: Like the ispDOWNLOAD connector, the MachXO drives the JTAG signals when it is programmed for USB
configuration. Only use the built-in ispDOWNLOAD cable or an external ispDOWNLOAD cable exclusively. It is not
recommended to switch between cables without first power cycling the board. Failure to follow this recommenda-
tion may cause unpredictable results and may possibly damage the board.
Table 15. Connections Between the USB Controller (CY7C68013A) and the MachXO
Cypress Pin
34
36
44
46
80
82
95
U0702:85
U0703:1
U0703:4
U0704:1
Pin
Pin
66
61
59
57
55
53
50
48
46
44
42
Signal Name
GP_D10
GP_D12
HPE_RESOUT#
GP_D0
GP_D2
GP_D4
GP_D6
GP_D8
USB_GPIO10
USB_GPIO12
USB_GPIO14
USB_GPIO16
USB_GPIO18
USB_GPIO20
USB_GPIO22
USB_GPIO24
USB_GPIO26
USB_GPIO28
USB_PWEN0
USB_PWEN1
USB_PWEN2
Signal Name
Signal Name
USB_GPIO8
MachXO Pin
FPGA Pin
FPGA Pin
G14
M14
H14
H12
K13
J12
L14
AC19
AA19
AE18
AC18
AD17
AB17
AE16
AE15
AE14
AE13
AA21
AE24
AF17
Y17
Y16
12
Pin
65
60
58
56
54
52
49
47
45
43
41
Cypress Pin
U0703:2
U0703:3
U0704:2
LatticeMico32/DSP Development Board
Pin
35
37
45
47
81
83
96
USB_GPIO11
USB_GPIO13
USB_GPIO15
USB_GPIO17
USB_GPIO19
USB_GPIO21
USB_GPIO23
USB_GPIO25
USB_GPIO27
USB_GPIO29
Signal Name
USB_GPIO9
Signal Name
for LatticeECP2 User’s Guide
USB_OC0#
USB_OC1#
USB_OC2#
Signal Name
GP_D11
GP_D13
GP_D1
GP_D3
GP_D5
GP_D7
GP_D9
FPGA Pin
AD18
AB19
AF18
AB18
AE17
AC17
AF16
AF15
AF14
AF13
-
FPGA Pin
AA16
Y20
Y19
MachXO Pin
M13
M12
N14
H13
K14
K12
J13