LFE2-50E-D-EVN Lattice, LFE2-50E-D-EVN Datasheet - Page 4
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LFE2-50E-D-EVN
Manufacturer Part Number
LFE2-50E-D-EVN
Description
MCU, MPU & DSP Development Tools LatticeMico32/DSP DEV BD/LatticeECP2
Manufacturer
Lattice
Datasheet
1.LFE2-50E-D-EVN.pdf
(57 pages)
Specifications of LFE2-50E-D-EVN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 4 of 57
- Download datasheet (2Mb)
Lattice Semiconductor
Overview
The following block diagram gives you an overview of the functionality of your LatticeMico32/DSP Development
Board. Subsequent pages illustrate the position of connectors, user interfaces, and modules.
Figure 1. LatticeMico32/DSP Development Board Block Diagram
Table 1. Board Defaults
LatticeECP2-50
LCD Backlight (X5)
Configuration Switch
Sigma Delta DAC Converter
Contrast Control
4-place DIP - Logic 1
SODIMM DDR 400 Setting (X18)
To PC
Item
PRG
TMS Switch Off (Down) LatticeECP2-50 FPGA can be programmed.
Reostat
Jumper
Jumper
Jumper
Switch
FPGA
Type
Programmed
Shorts Pins
Variable
Default
1 and 2
Status
Open
Open
Off
4
LatticeECP2-50
The bitstream is based on Example PlatformA and the
LED7SegsTest_ecp2 project. The LED7SegsTest_ecp2.mem
and LED7SegsTest_ecp2.bit files are included in the
LED7SegsTest_ecp2 project.
Visual indications of operation are:
• Left to Right and Right to Left scanning of the 8 LEDs.
• Upcount and roll over of the 7 segment displays from 0 to 99
Backlight is off.
Not set to any specific level.
Logic 0 on selected pins - see Table 18.
Set to below DDR400 memory use.
decimal at ~1 second intervals.
672 fpBGA
LatticeMico32/DSP Development Board
for LatticeECP2 User’s Guide
Comments
Expansion
Connector
Ethernet
3p LVDS
3p LVDS
10/100
RS232
AC97
SATA
SATA
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