LFE2-50E-D-EVN Lattice, LFE2-50E-D-EVN Datasheet - Page 20

• Manufacturer Part Number: LFE2-50E-D-EVN
• Description: MCU, MPU & DSP Development Tools LatticeMico32/DSP DEV BD/LatticeECP2
• Manufacturer: Lattice

Specifications of LFE2-50E-D-EVN

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 8. Schematic Illustration of the Prototyping Area
Asynchronous SRAM
The board is populated with two asynchronous K6R4016V1D SRAMs from Samsung. Each is 4 Mbit in size with a
data bus width of 16 bits. They are wired as one memory with a 32-bit data bus and a depth of 256 k. The 18-bit
address bus, the data bus and the control signals are connected directly to the FPGA. The 18-bit address bus,
named MEMORY_A0 through MEMORY_A17, addresses word (4 bytes) locations.
Table 23. Address Signals of the Asynchronous SRAM Chips U0404 and U0405
SRAM Pin
BB3V3_IO[21:0]
19
21
23
25
27
43
1
3
5
BB3V3_IO0
BB3V3_IO1
BB3V3_IO2
BB3V3_IO3
BB3V3_IO4
BB3V3_IO5
BB3V3_IO6
BB3V3_IO7
BB3V3_IO8
BB3V3_IO9
BB3V3_IO10
BB3V3_IO11
MEMORY_A10
MEMORY_A12
MEMORY_A14
MEMORY_A16
MEMORY_A0
MEMORY_A2
MEMORY_A4
MEMORY_A6
MEMORY_A8
Signal Name
TP0901
TP0902
TP0903
TP0904
TP0905
TP0906
TP0907
TP0908
TP0909
TP0910
TP0911
TP0912
GND
VCC3V3
TP0913
TP0914
TP0915
TP0916
TP0917
TP0918
TP0919
TP0920
TP0921
TP0922
TP0923
TP0924
TP0925
TP0926
TP0927
TP0928
TP0929
TP0930
TP0931
TP0932
TP0933
TP0934
TP0935
TP0936
TP0937
TP0938
TP0939
TP0940
TP0941
TP0942
TP0943
TP0944
TP0945
TP0946
TP0947
TP0948
FPGA Pin
C1
C2
D3
D4
D5
B3
B4
B5
A6
TP0949
TP0950
TP0951
TP0952
TP0953
TP0954
TP0955
TP0956
TP0957
TP0958
TP0959
TP0960
TP0961
TP0962
TP0963
TP0964
TP0965
TP0966
TP0967
TP0968
TP0969
TP0970
TP0971
TP0972
20
TP0973
TP0974
TP0975
TP0976
TP0977
TP0978
TP0979
TP0980
TP0981
TP0982
TP0983
TP0984
SRAM Pin
TP0985
TP0986
TP0987
TP0988
TP0989
TP0990
TP0991
TP0992
TP0993
TP0994
TP0995
TP0996
LatticeMico32/DSP Development Board
18
20
22
24
26
42
44
2
4
TP0997
TP0998
TP0999
TP09100
TP09101
TP09102
TP09103
TP09104
TP09105
TP09106
TP09107
TP09108
TP09109
TP09110
TP09111
TP09112
TP09113
TP09114
TP09115
TP09116
TP09117
TP09118
TP09119
TP09120
TP09121
for LatticeECP2 User’s Guide
TP09122
TP09123
TP09124
TP09125
TP09126
TP09127
TP09128
TP09129
TP09130
TP09131
TP09132
MEMORY_A11
MEMORY_A13
MEMORY_A15
MEMORY_A17
MEMORY_A1
MEMORY_A3
MEMORY_A5
MEMORY_A7
MEMORY_A9
Signal Name
TP09133
TP09134
TP09135
TP09136
TP09137
TP09138
TP09139
TP09140
TP09141
TP09142
TP09143
TP09144
BB3V3_IO12
BB3V3_IO13
BB3V3_IO14
BB3V3_IO15
BB3V3_IO16
BB3V3_IO17
BB3V3_IO18
BB3V3_IO19
BB3V3_IO20
BB3V3_IO21
BB3V3_CLK0+
BB3V3_CLK0-
BB3V3_IO[21:0]
FPGA Pin
DIFF
B2
A3
C3
A4
C4
A5
C5
E5
B6