Core8051-M Actel, Core8051-M Datasheet - Page 29

• Manufacturer Part Number: Core8051-M
• Description: Microcontroller Modules & Accessories 8B Microcontroller
• Manufacturer: Actel

Specifications of Core8051-M

• Product: Microcontroller Modules
• Data Bus Width: 8 bit, 16 bit, 32 bit
• Clock Speed: 36 MHz
• Interface Type: JTAG

4 – Core8051s Features
Software Memory Map
The Core8051s microcontroller utilizes the Harvard architecture, with separate code and data spaces.
Memory organization in Core8051s is similar to that of the industry standard 8051. There are three
memory areas, as shown in
The software memory map for the Core8051s is shown in
Figure 4-1 • Core8051s Software Memory Map
As far as the software programmer is concerned, there are three distinct memory spaces available, as
shown in
Program Memory
Core8051s can address up to 64 kbytes of program memory space, from 0000H to FFFFH. The external
memory bus interface
active. Program memory is read when the CPU performs fetching instructions or MOVC. After reset, the
CPU starts program execution from location 0000H. The lower part of the program memory includes
interrupt and reset vectors. The interrupt vectors are spaced at eight-byte intervals, starting from 0003H.
Program memory can be implemented as internal RAM, external RAM, external ROM, or a combination
of all three. Writing to external program memory is only supported in debug mode, using the OCI logic
block and external debugger hardware and software.
The program memory can use variable length accesses (MEMPSACKI-controlled), or a fixed number of
wait cycles may be inserted on each read. Refer to
information about configuring access to program memory.
•
•
•
64 kbytes
Program memory (internal RAM, external RAM, or external ROM)
External data memory (external RAM)
Internal data memory (internal RAM)
Figure
External Program
4-1.
Memory
NVM
(Table 4-1 on page
Figure
4-1:
256 Locations
256 Locations
256 Locations
60 kbytes
R e v i s i o n 2
31) services program memory when the MEMPSRD signal is
External Data RAM
Peripheral 15
Peripheral 0
External Data
Peripheral 1
"Program Memory Access" on page 22
Memory
Figure
4-1.
128 Bytes
128 Bytes
Word-Addressable Only
Internal RAM
Internal Data
SFR Subset
Memory
for more
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