LS-E2-L-BASE-PC-N Lattice, LS-E2-L-BASE-PC-N Datasheet - Page 24

Manufacturer Part Number

LS-E2-L-BASE-PC-N

Description

MCU, MPU & DSP Development Tools ispLEVER Base - LS ECP2 50E Std Dev Kit

Manufacturer

Lattice

Datasheet

1.LFE2-50E-L-EV.pdf (34 pages)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Lattice Semiconductor

Figure 6. Device Information Dialog

7. Click the green GO button on the toolbar; this will begin the download process into the LatticeECP2.

8. Upon successful download, the LatticeECP2 will be operational.

SPI Flash Download

For non-volatile storage of conﬁguration data, the LatticeECP2 device features an interface compatible with low-

cost SPI Serial Flash. ispVM System has the ability to program the SPI Serial Flash through JTAG. After the SPI

Serial Flash is programmed the LatticeECP2 can conﬁgure automatically from the conﬁguration data stored in the

Flash. The following steps describe the procedure for programming the SPI Serial Flash:

1. Install all three jumpers at J43, and the jumper at J44. This enables SPI mode by setting the CFG pins of the

2. Connect the download cable to J4. When using a 1x8 connector on the download cable, connect to the 1x10

3. Connect the evaluation board to an external 5V supply

4. Start the ispVM System software.

LatticeECP2, and it enables fast SPI reads. Check that J7 and J8 are properly set (see Table 6 and Table 7),

and that J10 and J11 are open.

header by justifying the alignment to pin 1 (pin 1 on the cable to pin 1 on the header, pin 1 is Vcc).

Important Note: The board must be un-powered when connecting, disconnecting, or reconnecting the isp-

DOWNLOAD Cable. Always connect the ispDOWNLOAD Cable's GND pin (black wire), before connecting any

other JTAG pins. Failure to follow these procedures can in result in damage to the LatticeECP2 FPGA device

and render the board inoperable.

LatticeECP2 Standard Evaluation Board

User’s Guide