LS-E2-L-BASE-PC-N Lattice, LS-E2-L-BASE-PC-N Datasheet - Page 8

• Manufacturer Part Number: LS-E2-L-BASE-PC-N
• Description: MCU, MPU & DSP Development Tools ispLEVER Base - LS ECP2 50E Std Dev Kit
• Manufacturer: Lattice

Specifications of LS-E2-L-BASE-PC-N

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 16. Configuration Mode (J43)
Table 17. SPIFAST
Table 18. Jumper Settings for sysCONFIG Parallel
Table 19. Jumper Settings for sysCONFIG Serial
All SPI Serial Flash shipped with this board support fast read. This jumper must be removed when using the sysCONFIG par-
allel port.
Location
J44
SPI (default)
SPIm
Slave Serial
Slave Parallel
Reserved
Reserved
Reserved
Reserved
Configuration
Position
1 to 2
Open
Mode
Location
Location
J35, J36
J35, J36
J35, J36
J35, J36
J31
J32
J33
J34
J43
J44
J31
J32
J33
J34
J43
J44
SPI fast read, enables read op-code 0x0B
SPI normal read, enables read op-code 0x03
Jumper (0)
Jumper (0)
Jumper (0)
Jumper (0)
Open (1)
Open (1)
Open (1)
Open (1)
CFG[2],
1 to 2
Don’t Care
Position
Position
All Open
1 to 2
2 to 3
1 to 2
1 to 2
2 to 3
3 to 4
1 to 2
Open
Open
Open
Open
Open
Open
Open
Open
Open
8
Function
See schematic
See schematic
Bypass Overflow
Flow-through Overflow
Open if driven by cable
Bypass Overflow
Not allowed
LatticeECP2 Standard Evaluation Board
Jumper (0)
Jumper (0)
Jumper (0)
Jumper (0)
Open (1)
Open (1)
Open (1)
Open (1)
CFG[1],
3 to 4
Notes
Notes
Jumper (0)
Jumper (0)
Jumper (0)
Jumper (0)
Open (1)
Open (1)
Open (1)
Open (1)
CFG[0],
5 to 6
User’s Guide
Default
X