LS-E2-L-BASE-PC-N Lattice, LS-E2-L-BASE-PC-N Datasheet - Page 7

• Manufacturer Part Number: LS-E2-L-BASE-PC-N
• Description: MCU, MPU & DSP Development Tools ispLEVER Base - LS ECP2 50E Std Dev Kit
• Manufacturer: Lattice

Specifications of LS-E2-L-BASE-PC-N

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 9. INITN Pin to JTAG
sysCONFIG Jumpers
Table 10. CS1N
Table 11. CSN
Table 12. DI/D[0]
Table 13. D[7]/DOUT
Table 14. CSON to CS1N (Loop-Through)
Table 15. CSON to CSN (Loop-Through)
This jumper is normally not installed.
Location
Location
Location
Location
Location
Location
Location
J11
J31
J32
J33
J34
J35
J36
Position
Position
Position
Position
Position
Position
Position
1 to 2
Open
1 to 2
2 to 3
Open
1 to 2
2 to 3
Open
1 to 2
2 to 3
1 to 2
2 to 3
1 to 2
Open
1 to 2
Open
Connects INITN pin to the JTAG chain
Disconnects INITN pin from the JTAG chain
Pulls CS1N high
Pulls CS1N low
No pull-up or pull-down on CS1N
Pulls CSN high
Pulls CSN low
No pull-up or pull-down on CSN
Routes DI to J40-5 to support serial mode
Routes data bit D[0] to J40-5 for SPIFAST support
Routes D[7] to J40-7 for SPI sysCONFIG support
Routes DOUT to J40-7 to support serial mode
CSON drives CS1N on the loop-through connector
CS1N on the loop-through connector is open
CSON drives CSN on the loop-through connector
CSN on the loop-through connector is open
7
Function
Function
Function
Function
Function
Function
Function
LatticeECP2 Standard Evaluation Board
User’s Guide
Default
Default
Default
Default
Default
Default
Default
X
X
X
X
X
X
X