XC3S1600E-5FG320C Xilinx Inc, XC3S1600E-5FG320C Datasheet - Page 116
XC3S1600E-5FG320C
Manufacturer Part Number
XC3S1600E-5FG320C
Description
PROGRAMMABLE MICROCHIP
Manufacturer
Xilinx Inc
Datasheet
1.XC3S1600E-5FG320C.pdf
(193 pages)
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Configuration and JTAG Timing
Table 16: Power-On Timing and the Beginning of Configuration
DS312-3 (v1.0) March 1, 2005
Advance Product Specification
Notes:
1.
2.
3.
T
T
T
T
POR
PROG
PL
ICCK
(2)
The numbers in this table are based on the operating conditions set forth in
and V
Power-on reset and the clearing of configuration memory occurs during this period.
This specification applies only to the Master Serial, SPI, BPI-Up, and BPI-Down modes.
(2)
Symbol
(3)
Notes:
1.
2.
3.
V
V
V
PROG_B
INIT_B
CCLK
CCAUX
(Supply)
(Supply)
(Supply)
(Input)
(Open-Drain)
(Output)
CCINT
CCAUX
CCO
R
The V
The Low-going pulse on PROG_B is optional after power-on but necessary for reconfiguration without a power cycle.
The rising edge of INIT_B samples the voltage levels applied to the mode pins (M0 - M2).
Bank 2
lines.
CCINT
The time from the application of V
Bank 2 supply voltage ramps (whichever occurs last) to the
rising transition of the INIT_B pin
The width of the low-going pulse on the PROG_B pin
The time from the rising edge of the PROG_B pin to the
rising transition on the INIT_B pin
The time from the rising edge of the INIT_B pin to the
generation of the configuration clock signal at the CCLK
output pin
, V
Figure 3: Waveforms for Power-On and the Beginning of Configuration
CCAUX
, and V
CCO
supplies may be applied in any order.
Description
1.0V
2.0V
1.0V
CCINT
T
www.xilinx.com
T
POR
PROG
, V
CCAUX
, and V
T
Table
PL
CCO
4. This means power must be applied to all V
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
All
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
All
T
Device
ICCK
DC and Switching Characteristics
All Speed Grades
Min
0.3
0.5
-
-
-
-
-
-
-
-
-
-
DS312-3_01_020505
Max
4.0
5
5
5
5
7
2
2
2
2
3
-
1.2V
2.5V
CCINT
Units
, V
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
µs
µs
CCO
13
,
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