XC3S1600E-5FG320C Xilinx Inc, XC3S1600E-5FG320C Datasheet - Page 120
XC3S1600E-5FG320C
Manufacturer Part Number
XC3S1600E-5FG320C
Description
PROGRAMMABLE MICROCHIP
Manufacturer
Xilinx Inc
Datasheet
1.XC3S1600E-5FG320C.pdf
(193 pages)
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Table 19: Timing for the JTAG Test Access Port
DS312-3 (v1.0) March 1, 2005
Advance Product Specification
Notes:
1.
Clock-to-Output Times
T
Setup Times
T
T
Hold Times
T
T
Clock Timing
T
T
F
TCKTDO
TDITCK
TMSTCK
TCKTDI
TCKTMS
CCH
CCL
TCK
The numbers in this table are based on the operating conditions set forth in
Symbol
TCK
TMS
TDI
TDO
(Input)
(Input)
(Input)
(Output)
R
The time from the falling transition on the TCK pin
to data appearing at the TDO pin
The time from the setup of data at the TDI pin to
the rising transition at the TCK pin
The time from the setup of a logic level at the TMS
pin to the rising transition at the TCK pin
The time from the rising transition at the TCK pin
to the point when data is last held at the TDI pin
The time from the rising transition at the TCK pin
to the point when a logic level is last held at the
TMS pin
The High pulse width at the TCK pin
The Low pulse width at the TCK pin
Frequency of the TCK signal
Description
T
TDITCK
T
TMSTCK
Figure 6: JTAG Waveforms
www.xilinx.com
T
TCKTDI
T
TCKTMS
Table
4.
T
TCKTDO
Min
1.0
7.0
7.0
All Speed Grades
0
0
5
5
-
T
CCH
DC and Switching Characteristics
1/F
TCK
Max
11.0
33
-
-
-
-
-
-
T
CCL
DS099_06_040703
Units
MHz
ns
ns
ns
ns
ns
ns
ns
17
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