AD9445BSVZ-105 Analog Devices Inc, AD9445BSVZ-105 Datasheet - Page 12

IC,A/D CONVERTER,SINGLE,14-BIT,BICMOS,TQFP,100PIN

AD9445BSVZ-105

Manufacturer Part Number
AD9445BSVZ-105
Description
IC,A/D CONVERTER,SINGLE,14-BIT,BICMOS,TQFP,100PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9445BSVZ-105

Design Resources
Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002) Using AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs (CN0046) Using ADL5562 Differential Amplifier to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0110)
Number Of Bits
14
Sampling Rate (per Second)
105M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
2.4W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9445BSVZ-105
Manufacturer:
ADI
Quantity:
131
Part Number:
AD9445BSVZ-105
Manufacturer:
Analog Devices Inc
Quantity:
10 000
AD9445
Pin No.
83
84
85
86
89
90
100
D12−
D12+
D13−
D13+ (MSB)
OR−
OR+
RF ENABLE
Mnemonic
Description
D12 Complement Output Bit.
D12 True Output Bit.
D13 Complement Output Bit.
D13 True Output Bit.
RF ENABLE Control Pin. CMOS-compatible control pin to optimize the configuration of
the AD9445 analog front end. Connecting RF ENABLE to AGND optimizes SFDR
performance for applications with analog input frequencies <210 MHz for 125 MSPS
speed grade and <230 MHz for the 105 MSPS speed grade. For applications with analog
inputs >225 MHz for the 125 MSPS speed grade and >230 MHz for the 105 MSPS speed
grade, this pin should be connected to AVDD1 for optimum SFDR performance. Power
dissipation from AVDD2 increases by 150 mW to 200 mW.
Out-of-Range Complement Output Bit.
Out-of-Range True Output Bit.
Rev. 0 | Page 12 of 40

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