ADUC7061BCPZ32-RL Analog Devices Inc, ADUC7061BCPZ32-RL Datasheet - Page 49

• Manufacturer Part Number: ADUC7061BCPZ32-RL
• Description: DUAL 24-BIT AFE AND ARM 7 I.C
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7061BCPZ32-RL

• Design Resources: USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075) 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 2.625 V
• Data Converters: A/D 5x24b, 8x24b, D/A 1x14b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Primary Channel ADC Data Register
Name:
Address:
Default value:
Access:
Function:
Table 49. ADC0DAT MMR Bit Designations
Bit
23:0
Auxiliary Channel ADC Data Register
Name:
Address:
Default value:
Access:
Function:
Table 50. ADC1DAT MMR Bit Designations
Bit
23:0
ADC0DAT
0xFFFF051C
0x00000000
Read only
This ADC data MMR holds the 24-/16-bit
conversion result from the primary ADC. The
ADC does not update this MMR if the ADC0
conversion result ready bit (ADCSTA[0]) is
set. A read of this MMR by the MCU clears
all asserted ready flags (ADCSTA[1:0]).
ADC1DAT
0xFFFF0520
0x00000000
Read only
This ADC data MMR holds the 24-bit
conversion result from the auxiliary ADC.
The ADC does not update this MMR if the
ADC0 conversion result ready bit
(ADCSTA[1]) is set.
Description
ADC0 24-bit/16-bit conversion result.
Description
ADC1 24-bit conversion result.
Rev. B | Page 49 of 108
Primary Channel ADC Offset Calibration Register
Name:
Address:
Default value:
Access:
Function:
Table 51. ADC0OF MMR Bit Designations
Bit
15:0
Auxiliary Channel ADC Offset Calibration Register
Name:
Address:
Default value:
Access:
Function:
Description
ADC0 16-bit offset calibration value.
ADC0OF
0xFFFF0524
Part specific, factory programmed
Read and write
This ADC offset MMR holds a 16-bit offset
calibration coefficient for the primary ADC.
The register is configured at power-on with a
factory default value. However, this register
automatically overwrites if an offset
calibration of the primary ADC is initiated by
the user via bits in the ADCMDE MMR. User
code can write to this calibration register only
if the ADC is in idle mode. An ADC must be
enabled and in idle mode before being
written to any offset or gain register. The
ADC must be in idle mode for at least 23 μs.
ADC1OF
0xFFFF0528
Part specific, factory programmed
Read and write
This offset MMR holds a 16-bit offset
calibration coefficient for the auxiliary
channel. The register is configured at power-
on with a factory default value. However, this
register is automatically overwritten if an
offset calibration of the auxiliary channel is
initiated by the user via bits in the ADCMDE
MMR. User code can write to this calibration
register only if the ADC is in idle mode. An
ADC must be enabled and in idle mode
before being written to any offset or gain
register. The ADC must be in idle mode for
at least 23 μs.
ADuC7060/ADuC7061