DSPIC33FJ32MC204-E/ML Microchip Technology, DSPIC33FJ32MC204-E/ML Datasheet - Page 103
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DSPIC33FJ32MC204-E/ML
Manufacturer Part Number
DSPIC33FJ32MC204-E/ML
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
Specifications of DSPIC33FJ32MC204-E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8.0
FIGURE 8-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
SOSCO
Note 1: See
SOSCI
R
(2)
2: Some registers and associated bits
OSCILLATOR
CONFIGURATION
2: If the Oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 MΩ must be connected.
3: The term
OSC1
OSC2
Oscillator
TUN<5:0>
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 devices. It is not
intended to be a comprehensive refer-
ence source. To complement the infor-
mation in this data sheet, refer to Section
7.
dsPIC33F/PIC24H
Manual”, which is available from the
Microchip
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Throughout this document,
be different when DOZE mode is used with any ratio other than 1:1 which is the default.
FRC
Primary Oscillator (P
Secondary Oscillator (S
“Oscillator”
Figure 8-2
POSCMD<1:0>
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 OSCILLATOR SYSTEM DIAGRAM
Oscillator
F
LPRC
P
refers to the clock source for all of the peripherals, while
for PLL details.
LPOSCEN
(DS70186)
OSC
S1
÷ 16
S3
Family
web
OSC
)
)
F
CY
FRCDIV<2:0>
and
Reference
F
of
P
are used interchangably, except in the case of DOZE mode.
PLL
site
the
in
(1)
XTPLL, HSPLL,
ECPLL, FRCPLL
Clock Fail
S7
XT, HS, EC
FRCDIV16
The oscillator system for dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 devices provides:
• External and internal oscillator options as clock
• An on-chip Phase-Locked Loop (PLL) to scale the
• An internal FRC oscillator that can also be used
• Clock switching between various clock sources.
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON).
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
FRCDIVN
sources.
internal operating frequency to the required
system clock frequency.
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware.
savings.
clock failure and takes fail-safe measures.
selection.
Figure
SOSC
LPRC
FRC
Clock Switch
NOSC<2:0> FNOSC<2:0>
8-1.
S1/S3
S7
S0
S5
S4
S2
S6
F
CY
refers to the clock source for the CPU.
÷ 2
Reset
DOZE<2:0>
WDT, PWRT,
DS70283H-page 103
Timer 1
F
FSCM
P
and
F
F
OSC
F
CY
F
P
(3)
CY
(3)
will
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