EVAL-ADF7021-NDBZ2 Analog Devices Inc, EVAL-ADF7021-NDBZ2 Datasheet - Page 50

• Manufacturer Part Number: EVAL-ADF7021-NDBZ2
• Description: 860 MHz To 870 MHz
• Manufacturer: Analog Devices Inc
• Type: Transceiver, FSKr

Specifications of EVAL-ADF7021-NDBZ2

• Frequency: 860MHz ~ 870MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADF7021-N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADF7021-N
REGISTER 1—VCO/OSCILLATOR REGISTER
•
•
•
The R_COUNTER and XTAL_DOUBLER relationship is
as follows:
CLOCKOUT_DIVIDE is a divided-down and inverted
version of the XTAL and is available on Pin 36 (CLKOUT).
Set XOSC_ENABLE high when using an external crystal.
If using an external oscillator (such as TCXO) with CMOS-
level outputs into Pin OSC2, set XOSC_ENABLE low. If
using an external oscillator with a 0.8 V p-p clipped sine
wave output into Pin OSC1, set XOSC_ENABLE high.
If XTAL_DOUBLER = 0,
If XT
VCL1
0
1
AL_DOUBLER =1,
VA2
0
0
1
1
VCO_INDUCTOR
INTERNAL L VCO
EXTERNAL L VCO
VB4
0
0
.
1
VA1
0
1
0
1
VB3
0
0
.
1
NOMINAL
VCO ADJUST UP 1
VCO ADJUST UP 2
VCO ADJUST UP 3
VCO CENTER
FREQ ADJUST
VB2
0
1
.
1
PFD
PFD
VB1
1
0
.
1
=
VCO_BIAS
=
VCO_BIAS
CURRENT
0.25mA
0.5mA
3.75mA
R
R
RFD1 RF_DIVIDE_BY_2
_
0
1
_
XTAL
COUNTER
COUNTER
XTAL
OFF
ON
VE1
0
1
Figure 64. Register 1—VCO/Oscillator Register Map
CP2
0
0
1
1
×
2
LOOP
CONDITION
VCO OFF
VCO ON
CP1
RSET
0
1
0
1
I
3.6kΩ
0.3
0.9
1.5
2.1
CP
Rev. 0 | Page 50 of 64
(mA)
XTAL_
BIAS
XB2 XB1
0
0
1
1
•
•
•
0
1
0
1
X1 XOSC_ENABLE
0
1
The VCO_BIAS bits should be set according to Table 9.
The VCO_ADJUST bits adjust the center of the VCO
operating band. Each bit typically adjusts the VCO band
up by 1% of the RF operating frequency (0.5% if
RF_DIVIDE_BY_2 is enabled).
Setting VCO_INDUCTOR to external allows the use of the
external inductor VCO, which gives RF operating
frequencies of 80 MHz to 650 MHz. If the internal
inductor VCO is being used for operation, set this bit low.
OFF
ON
D1
0
1
20µA
25µA
30µA
35µA
XTAL_
BIAS
XTAL_
DOUBLER
DISABLE
ENABLED
CLKOUT_
DIVIDE
CL4
0
0
0
.
.
.
1
CL3
0
0
0
.
.
.
1
R_COUNTER
CL2
0
0
1
.
.
.
1
R3
0
0
.
.
.
1
R2
0
1
.
.
.
1
CL1
0
1
0
.
.
.
1
R1
1
0
.
.
.
1
CLKOUT_
DIVIDE RATIO
OFF
2
4
.
.
.
30
RF R_COUNTER
DIVIDE RATIO
1
2
.
.
.
7
ADDRESS
BITS