EVAL-ADF7021-NDBZ2 Analog Devices Inc, EVAL-ADF7021-NDBZ2 Datasheet - Page 63

860 MHz To 870 MHz

EVAL-ADF7021-NDBZ2

Manufacturer Part Number
EVAL-ADF7021-NDBZ2
Description
860 MHz To 870 MHz
Manufacturer
Analog Devices Inc
Type
Transceiver, FSKr
Datasheet

Specifications of EVAL-ADF7021-NDBZ2

Frequency
860MHz ~ 870MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADF7021-N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 15—TEST MODE REGISTER
0
1
2
3
CAL_OVERRIDE
AUTO CAL
OVERRIDE GAIN
OVERRIDE BW
OVERRIDE BW AND GAIN
Analog RSSI can be viewed on the Test_A pin by setting
ANALOG_TEST_MODES to 11.
Tx_TEST_MODES can be used to enable test modulation.
0
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
REG1_PD
NORMAL
PWR DWN
0
1
ANALOG_TEST_MODES
BAND GAP VOLTGE
40µA CURRENT FROM REG4
FILTER I CHANNEL: STAGE 1
FILTER I CHANNEL: STAGE 2
FILTER I CHANNEL: STAGE 1
FILTER Q CHANNEL: STAGE 1
FILTER Q CHANNEL: STAGE 2
FILTER Q CHANNEL: STAGE 1
ADC REFERENCE VOLTAGE
BIAS CURRENT FROM RSSI 5µA
FILTER COARSE CAL OSCILLATOR O/P
ANALOG RSSI I CHANNEL
OSET LOOP +VE FBACK V (I CH)
SUMMED O/P OF RSSI RECTIFIER+
SUMMED O/P OF RSSI RECTIFIER–
BIAS CURRENT FROM BB FILTER
FORCE_LD_HIGH
NORMAL
FORCE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PLL_TEST_MODES
NORMA
R DIV
N DIV
RCNTR/2 ON MUXOUT
NCNTR/2 ON MUXOUT
ACNTR TO MUXOUT
PFD PUMP UP TO MUXOUT
PFD PUMP DN TO MUXOUT
SDATA TO MUXOUT (OR SREAD?)
ANALOG LOCK DETECT ON MUXOUT
END OF COARSE CAL ON MUXOUT
END OF FINE CAL ON MUXOUT
FORCE NEW PRESCALER CONFIG.
FOR ALL N
TEST MUX SELECTS DATA
LOCK DETECT PERCISION
RESERVED
L OPERATION
ANALOG_TEST_
MODES
PLL_TEST_
Figure 78. Register 15—Test Mode Register Map
0
1
2
3
4
5
6
7
MODES
NORMAL, NO OUTPUT
DEMOD CLK
CDR CLK
SEQ CLK
BB OFFSET CLK
SIGMA DELTA CLK
ADC CLK
TxRxCLK
CLK MUXES ON CLKOUT PIN
0
1
2
3
4
5
6
7
Rev. 0 | Page 63 of 64
0
1
2
3
4
5
6
7
PFD/CP_TEST_MODES
DEFAULT, NO BLEED
(+VE) CONSTANT BLEED
(–VE) CONSTANT BLEED
(–VE) PULSED BLEED
(–VE) PULSE BLD, DELAY UP?
CP PUMP UP
CP TRI-STATE
CP PUMP DN
CLK_MUX
Σ-Δ_TEST_MODES
DEFAULT, 3RD ORDER SD, NO DITHER
1ST ORDER SD
2ND ORDER SD
DITHER TO FIRST STAGE
DITHER TO SECOND STAGE
DITHER TO THIRD STAGE
DITHER × 8
DITHER × 32
0
1
2
3
4
5
6
The CDR block can be bypassed by setting Rx_TEST_
MODES to 4, 5, or 6, depending on the demodulator used.
Tx_TEST_MODES
NORMAL OPERATION
Tx CARRIER ONLY
Tx +VE TONE ONLY
Tx –VE TONE ONLY
Tx "1010" PATTERN
Tx PN9 DATA, AT PROGRAMED RATE
Tx SYNC BYTE REPEATEDLY
Σ-Δ_TEST_
MODES
Tx_TEST_
MODES
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Rx_TEST_MODES
NORMAL
SCLK, SDATA -> I, Q
REVERSE I,Q
CORRELATOR SLICER ON TxRxDATA
LINEAR SLICER ON RXDATA
SDATA TO CDR
ADDITIONAL FILTERING ON I, Q
ENABLE REG 14 DEMOD PARAMETERS
POWER DOWN DDT AND ED IN T/4 MODE
ENVELOPE DETECTOR WATCHDOG DISABLED
RESERVED
PROHIBIT CALACTIVE
FORCE CALACTIVE
ENABLE DEMOD DURING CAL
I,Q TO TxRxCLK, TxRxDATA
3FSK SLICER ON TxRxDATA
Rx_TEST_
MODES
ADF7021-N
ADDRESS
BITS

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