DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 2

• Manufacturer Part Number: DS33Z11
• Description: Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z11

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
2
3
4
5
6
7
8
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10 D
2.11 T
2.12 S
7.1
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10 C
8.11 A
8.12 F
8.13 ETHERNET I
8.14 E
8.15 BERT..........................................................................................................................................................50
DESCRIPTION..................................................................................................................................7
FEATURE HIGHLIGHTS ..................................................................................................................8
APPLICATIONS .............................................................................................................................11
ACRONYMS AND GLOSSARY .....................................................................................................14
MAJOR OPERATING MODES.......................................................................................................15
BLOCK DIAGRAMS.......................................................................................................................16
PIN DESCRIPTIONS ......................................................................................................................17
FUNCTIONAL DESCRIPTION .......................................................................................................29
8.1.1
8.1.2
8.1.3
8.3.1
8.3.2
8.12.1 Full-Duplex Flow Control ....................................................................................................................41
8.12.2 Half Duplex Flow control.....................................................................................................................42
8.12.3 Host-Managed Flow control................................................................................................................42
8.13.1 DTE and DCE Mode ...........................................................................................................................45
8.14.1 MII Mode Options................................................................................................................................48
8.14.2 RMII Mode ..........................................................................................................................................48
8.14.3 PHY MII Management Block and MDIO Interface ..............................................................................49
8.15.1 Receive Data Interface .......................................................................................................................50
8.15.2 Repetitive Pattern Synchronization ....................................................................................................51
G
S
HDLC ...........................................................................................................................................................8
C
X.86 S
SDRAM I
MAC I
M
S
P
P
SPI S
CLOCK STRUCTURE ...............................................................................................................................31
R
I
G
P
D
S
NITIALIZATION AND
EST AND
LOW
ERIAL
ERIAL
PECIFICATIONS
IN
ROCESSOR
ER
ERIAL
RBITER
THERNET
OMMITTED
EFAULT
ESETS
EVICE
ONNECTIONS AND
ENERAL
LOBAL
ICROPROCESSOR
F
-P
Read-Write/Data Strobe Modes..........................................................................................................30
Clear on Read.....................................................................................................................................30
Interrupt and Pin Modes .....................................................................................................................30
Serial Interface Clock Modes..............................................................................................................33
Ethernet Interface Clock Modes .........................................................................................................33
UNCTIONAL
ERIAL
C
NTERFACE
ORT
UPPORT
I
SPI I
I
I
ONTROL
NTERFACE
NTERFACE
A
R
NTERRUPTS
......................................................................................................................................................39
C
.......................................................................................................................................................8
NTERFACE
ND
D
ESOURCES
MAC ..........................................................................................................................................46
R
ONFIGURATIONS
IAGNOSTICS
EEPROM I
I
NTERFACE
I
ESOURCES
NFORMATION
L
NTERFACE
NTERFACE
OW
..............................................................................................................................................8
...........................................................................................................................................40
C
............................................................................................................................................9
D
OMPLIANCE
P
ESCRIPTION
.........................................................................................................................................8
.......................................................................................................................................38
C
I
Q
NTERFACE
OWER
.......................................................................................................................................9
ONFIGURATION
....................................................................................................................................36
UEUES
...................................................................................................................................35
—M
NTERFACE
.................................................................................................................................9
...............................................................................................................................29
...............................................................................................................................35
P
R
M
ORT
ASTER
............................................................................................................................9
ATE
.........................................................................................................................38
ODES
......................................................................................................................10
.......................................................................................................................9
.....................................................................................................................17
.....................................................................................................................43
(CIR) C
TABLE OF CONTENTS
................................................................................................................30
................................................................................................................34
M
.............................................................................................................35
ODE
ONTROLLER
O
NLY
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