DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 31

• Manufacturer Part Number: DS33Z11
• Description: Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z11

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3 CLOCK STRUCTURE
The DS33Z11 clocks sources and functions are as follows:
The following table provides the different clocking options for the Ethernet interface.
Table 8-1 Clocking Options for the Ethernet Interface
RMIIMIIS
1 (RMII)
1 (RMII)
0 (MII)
0 (MII)
0 (MII)
Pin
•
•
•
•
•
•
Serial Transmit Data (TCLKI) and Serial Receive Data (RCLKI) clock inputs are used to transfer data
from the serial interface. These clocks can be continuous or gapped.
System Clock (SYSCLKI) input. Used for internal operation. This clock input cannot be a gapped clock. A
clock supply with ±100 ppm frequency accuracy is suggested. A buffered version of this clock is provided
on the SDCLKO pin for the operation of the SDRAM. A divided and buffered version of this clock is
provided on the SPICK pin for Serial EEPROM operation. A divided and buffered version of this clock is
provided on REF_CLKO for the RMII/MII interface.
Packet Interface Reference clock (REF_CLK) input that can be 25 or 50 MHz. This clock is used as the
timing reference for the RMII/MII interface.
The Transmit and Receive clocks for the MII Interface (TX_CLK and RX_CLK). In DTE mode, these are
input pins and accept clocks provided by an Ethernet PHY. In the DCE mode, these are output pins and
will output an internally generated clock to the Ethernet PHY. The output clocks are generated by internal
division of REF_CLK. In RMII mode, only the REF_CLK input is used.
REF_CLKO is an output clock that is generated by dividing the 100 MHz System clock (SYSCLKI) by 2 or
4.
A Management Data Clock (MDC) output is derived from SYSCLKI and is used for information transfer
between the internal Ethernet MAC and external PHY. The MDC clock frequency is 1.67 MHz.
Speed
Mbps
Mbps
Mbps
Mbps
Mbps
100
100
10
10
10
DCE/
DCE
DCE
DTE
DTE
-
-
REF_CLKO
25 MHz
25 MHz
25 MHz
50 MHz
50 MHz
Output
+/- 100 ppm
+/- 100 ppm
+/- 100 ppm
+/- 100 ppm
+/- 100 ppm
REF_CLK
25 MHz
25 MHz
25 MHz
50 MHz
50 MHz
31 of 172
Input
Not Applicable
Not Applicable
Input from
RX_CLK
2.5 MHz
(Output)
(Output)
25 MHz
PHY
Not Applicable
Not Applicable
Input from
TX_CLK
2.5 MHz
(Output)
(Output)
25 MHz
PHY
1.67 MHz
1.67 MHz
1.67 MHz
1.67 MHz
1.67 MHz
Output
MDC