DS33Z11 Maxim Integrated Products, DS33Z11 Datasheet - Page 58
DS33Z11
Manufacturer Part Number
DS33Z11
Description
Network Controller & Processor ICs Ethernet Mapper Ethe rnet-Serial TDM Ethe
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33Z11.pdf
(172 pages)
Specifications of DS33Z11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 8-13 X.86 Encapsulation of the MAC field
The DS33Z11 will encode the MAC Frame with the LAPS encapsulation on a complete serial stream if configured
for X.86 mode in the register LI.TX86E. The DS33Z11 provides the following functions:
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•
•
The sequence of processing performed by the receiver is as follows:
•
•
•
•
•
•
•
Control Registers for Address, SAPI, Destination Address, Source Address
32 bit FCS enabled
Programmable X
Programmable octets X
Detect the Start Flag (7E)
Remove Rate adaptation octets 7D, DD.
Perform transparency-processing 7D, 5E is converted to 7E and 7D, 5D is converted to 7D.
Check for a valid Address, Control and SAPI fields (LI.TRX86A to LI.TRX86SAPIL)
Perform FCS checking
Detect the closing flag.
MSB
2nd Octect of SAPI(0x01)
1st Octect of SAPI(0xfe)
Destination Adrs(DA)
Source Adrs(SA)
MAC Client Data
43
Address(0x04)
FCS for LAPS
Control(0x03)
FCS for MAC
Length/Type
+1 scrambling
Flag(0x7E)
Flag(0x7E)
PAD
43
+1 descrambling
Number of Bytes
LSB
46-1500
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