LAN9313I-NZW SMSC, LAN9313I-NZW Datasheet - Page 138

• Manufacturer Part Number: LAN9313I-NZW
• Description: Ethernet ICs Three Port 10/100 Ethernet Switch
• Manufacturer: SMSC
• Type: Three Port Managed Ethernet Switchr

Specifications of LAN9313I-NZW

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 155 mA, 270 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.7 (06-29-10)
10.2.2
PTP ADDRESS
User Defined
(Alternate 1)
(Alternate 2)
(Alternate 3)
224.0.1.129
224.0.1.130
224.0.1.131
224.0.1.132
(Primary)
PTP Message Detection
In order to provide the most flexibility, loose packet type matching is used by the LAN9313/LAN9313i.
This assumes that for all packets received with a valid FCS, only the MAC destination address is
required to qualify them as a PTP message. For Ethernet, four multicast addresses are specified in
the PTP protocol: 224.0.1.129 through 224.0.1.132. These map to Ethernet MAC addresses
01:00:5e:00:01:81 through 01:00:5e:00:01:84. Each of these addresses has one enable bit per port in
the
as a PTP address on the specified port.
In addition to the fixed addresses, a user defined (host programmable) PTP address may be input via
the
Address Low-DWORD Register
disabled/enabled as a PTP address on each port via the dedicated enable bits in the
Configuration Register
corresponding enable bits can be seen in
Once a packet is determined to match a PTP destination address, it is further qualified as a Sync or
Delay_Req message type. On Ethernet, PTP uses UDP messages. Within the UDP payload is the PTP
control byte (offset 32 starting at 0). This byte determines the message type: 0x00 for a Sync message,
0x01 for a Delay_Req message. The UDP payload starts at packet byte offset 42 (from 0) for untagged
packets and at byte offset 46 for tagged packets.
Note: Both tagged and untagged packets are supported. Only Ethernet II packet encoding and IPv4
Note: For proper routing of the PTP packets, the host must program an entry into the switch engine
1588 Auxiliary MAC Address High-WORD Register (1588_AUX_MAC_HI)
1588 Configuration Register (1588_CONFIG)
are supported.
Address Logic Resolution (ALR) Table. The MAC address should be one of the reserved
Multicast addresses in
Valid bits must also be set. Refer to
information.
(1588_CONFIG). A summary of the supported PTP multicast addresses and
1588_AUX_MAC_LO registers)
Table 10.3 PTP Multicast Addresses
(1588_AUX_MAC_HI &
User Defined Address
CORRESPONDING
01:00:5e:00:01:81
01:00:5e:00:01:82
01:00:5e:00:01:83
01:00:5e:00:01:84
MAC ADDRESS
Table
DATASHEET
(1588_AUX_MAC_LO). The user defined address may be
10.3, with Port 0(External MII) as a destination.The Static and
138
Table
10.3.
Chapter 6, "Switch Fabric," on page 57
which enables/disables the corresponding address
Three Port 10/100 Managed Ethernet Switch with MII
RELATED ENABLE BITS IN THE
MAC_USER_EN_MII (Port 0)
MAC_ALT1_EN_MII (Port 0)
MAC_ALT2_EN_MII (Port 0)
MAC_ALT3_EN_MII (Port 0)
MAC_USER_EN_1 (Port 1)
MAC_USER_EN_2 (Port 2)
1588_CONFIG REGISTER
MAC_PRI_EN_MII (Port 0)
MAC_ALT1_EN_1 (Port 1)
MAC_ALT1_EN_2 (Port 2)
MAC_ALT2_EN_1 (Port 1)
MAC_ALT2_EN_2 (Port 2)
MAC_ALT3_EN_1 (Port 1)
MAC_ALT3_EN_2 (Port 2)
MAC_PRI_EN_1 (Port 1)
MAC_PRI_EN_2 (Port 2)
and
SMSC LAN9313/LAN9313i
1588 Auxiliary MAC
Datasheet
for more
1588