AD9912/PCBZ Analog Devices Inc, AD9912/PCBZ Datasheet - Page 2

Eval Board

AD9912/PCBZ

Manufacturer Part Number
AD9912/PCBZ
Description
Eval Board
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Datasheets

Specifications of AD9912/PCBZ

Kit Features
Flexible System Clock I/P Accepts Crystal
Supported Devices
AD9912
Tool / Board Applications
Direct Digital Synthesizer
Development Tool Type
Hardware - Eval/Demo Board
Mcu Supported Families
AD9912
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9912
Primary Attributes
14-Bit DAC, 48-Bit Tuning Word Width
Secondary Attributes
1GHz, Graphical User Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
AD9912/PCBZ
TABLE OF CONTENTS
Features .............................................................................................. 1
Package Contents .............................................................................. 1
General Description ......................................................................... 1
Evaluation Board Block Diagram ................................................... 1
Revision History ............................................................................... 2
Evaluation Board Physical Connections ....................................... 3
Evaluation Board Software Setup ................................................... 5
Evaluation Software Main Window ............................................... 6
REVISION HISTORY
1/08—Revision 0: Initial Version
Power Connections ...................................................................... 3
Connections to PC ....................................................................... 3
Signal Connections ...................................................................... 3
Using an Oscillator for the System Clock .................................. 4
Using a Crystal for the System Clock ........................................ 4
Using an External Reconstruction Filter ................................... 4
Software Installation .................................................................... 5
Running the Software .................................................................. 5
Interactive Block Diagram .......................................................... 6
Rev. 0 | Page 2 of 12
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Evaluation Software Functional Blocks ..........................................8
AD9912 Evaluation Board Reconstruction Filter .........................9
AD9912 System Clock PLL Loop Filter....................................... 11
Ordering Information .................................................................... 12
Menu Bar ........................................................................................6
Button Bar ......................................................................................7
Interactive Block Diagram ...........................................................8
S-Divider Settings Window .........................................................8
DDS and Clock Multiplier Control .............................................8
CMOS Driver and Clock Out ......................................................8
Status and IRQ Control Window ................................................8
Debug Window ..............................................................................8
Register Map (Regmap Values) Window ...................................8
Single-Ended Filter Design ..........................................................9
Differential Filter Design ........................................................... 10
Ordering Guide .......................................................................... 12
ESD Caution................................................................................ 12
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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