MT48H16M16LFBF-75:H TR Micron Technology Inc, MT48H16M16LFBF-75:H TR Datasheet - Page 39

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MT48H16M16LFBF-75:H TR

Manufacturer Part Number
MT48H16M16LFBF-75:H TR
Description
DRAM Chip Mobile SDRAM 256M-Bit 16Mx16 1.8V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H16M16LFBF-75:H TR

Package
54VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
8|6 ns
Operating Temperature
0 to 70 °C
Command 1
Figure 12: Initialize and Load Mode Register
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
BA0, BA1
Address
DQM
CLK
CKE
A10
Power-up:
CLK stable
DQ
V
DD
and
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T = 100µs
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CMS
CKS
Notes:
NOP
T0
t
High-Z
t
CMH
CKH
t
CK
1. PRE = PRECHARGE command, AR = AUTO REFRESH command, LMR = LOAD MODE REGIS-
2. NOPs or DESELECTs must only be provided during
3. NOPs or DESELECTs must only be provided during
TER command.
Precharge
All banks
all banks
t
AS
PRE
T1
t AH
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256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Tn + 1
AR
t
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RFC
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2
To + 1
AR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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2
Load mode
t AS t AH
t
AS
register
BA0 = L,
BA1 = L
Code
Code
Tp + 1
LMR
t
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RFC time.
MRD time.
AH
t
MRD
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Load extended
mode register
3
©2008 Micron Technology, Inc. All rights reserved.
BA0 = L,
BA1 = H
Code
BA0 = L,
Code
BA1 = L
LMR
Tq + 1
t
Initialization
MRD
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3
Valid
Valid
Valid
Valid
Tr + 1
Don’t Care
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