MT48H16M16LFBF-75:H TR Micron Technology Inc, MT48H16M16LFBF-75:H TR Datasheet - Page 71

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MT48H16M16LFBF-75:H TR

Manufacturer Part Number
MT48H16M16LFBF-75:H TR
Description
DRAM Chip Mobile SDRAM 256M-Bit 16Mx16 1.8V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H16M16LFBF-75:H TR

Package
54VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
8|6 ns
Operating Temperature
0 to 70 °C
Figure 41: WRITE With Auto Precharge Interrupted by a READ
Figure 42: WRITE With Auto Precharge Interrupted by a WRITE
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Internal
States
Internal
States
Command
Command
Note:
Note:
Address
Address
Bank m
Bank m
Bank n
Bank n
CLK
CLK
DQ
DQ
1. DQM is LOW.
1. DQM is LOW.
Page active
Page active
NOP
T0
T0
NOP
WRITE - AP
WRITE - AP
Page active
Bank n,
Page active
Bank n,
Bank n
Bank n
Col a
T1
D
T1
Col a
D
IN
IN
WRITE with burst of 4
WRITE with burst of 4
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
T2
T2
NOP
D
NOP
D
IN
IN
71
READ - AP
Bank m,
T3
T3
Col d
Bank m
D
NOP
IN
Interrupt burst, write-back
t
WR - bank n
READ with burst of 4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
WRITE - AP
Bank m,
Col d
T4
Bank m
T4
D
NOP
CL = 3 (bank m)
t
Interrupt burst, write-back
WR - bank n
IN
WRITE with burst of 4
T5
T5
NOP
NOP
D
t
IN
Precharge
RP - bank n
PRECHARGE Operation
T6
T6
NOP
D
NOP
D
OUT
t RP - bank n
Precharge
IN
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Don’t Care
Don’t Care
T7
T7
D
NOP
NOP
D
t WR - bank m
OUT
t RP - bank m
IN
Write-back

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