MT48H16M16LFBF-75:H TR Micron Technology Inc, MT48H16M16LFBF-75:H TR Datasheet - Page 9

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MT48H16M16LFBF-75:H TR

Manufacturer Part Number
MT48H16M16LFBF-75:H TR
Description
DRAM Chip Mobile SDRAM 256M-Bit 16Mx16 1.8V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H16M16LFBF-75:H TR

Package
54VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
8|6 ns
Operating Temperature
0 to 70 °C
Functional Block Diagram
Figure 2: Functional Block Diagram
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
BA0, BA1
Address
CAS#
RAS#
WE#
CKE
CLK
CS#
Address
register
Mode register
EXT mode
register
Control
logic
Refresh
counter
2
address
2
MUX
Row
Column/
counter/
address
control
Bank
latch
logic
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
decoder
address
Bank0
latch
row
and
9
DQM mask logic
Sense amplifiers
read data latch
write drivers
I/O gating
decoder
memory
Column
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank0
Bank1
array
Bank2
Bank3
Functional Block Diagram
BA1
n
n
0
0
1
1
©2008 Micron Technology, Inc. All rights reserved.
register
register
output
BA0
input
Data
Data
0
1
0
1
Bank
0
1
2
3
n
DQM
DQ

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