MAX11008BETM+ Maxim Integrated Products, MAX11008BETM+ Datasheet - Page 42

• Manufacturer Part Number: MAX11008BETM+
• Description: RF Wireless Misc IC CTLR LDMOS BIAS DUAL
• Manufacturer: Maxim Integrated Products

Specifications of MAX11008BETM+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual RF LDMOS Bias Controller with
Nonvolatile Memory
4) The resulting LUT pointer value is bound-limited to
5) The final LUT pointer value is calculated by shifting
Table 5. Temperature/APC LUT
Configuration Register
Table 5a. LUT Pointer Sizes and Offset
Ranges
*POFF is either a negative or positive number. When POFF is
negative its value is represented in two’s complement format.
42
Interpolated Data
D [ 15:10]
PSIZE
DATA
D[9:8]
D[7:6]
D[5:3]
D[2:0]
BITS
ensure it fits within the corresponding LUT. Negative
pointer values are limited to zero, and pointer values
that extend beyond the range of the LUT are limited
to the last entry.
SOT to the left by 5 bits and then adding it to the
current LUT pointer value. If no linear interpolation
(INT = 00) is to be performed, the resulting LUT
pointer value is equal to the absolute EEPROM
address from which the LUT data is retrieved. If lin-
ear interpolation is to be performed (INT = 01, 10, or
11), the two LUT addresses that are closest to the
resulting LUT pointer value and their corresponding
data values are entered into the following equation
to calculate the interpolated data value that is used
in the V
00
01
10
11
______________________________________________________________________________________
5-bit pointer (access up
to 32 data locations)
6-bit pointer (access up
to 64 data locations)
7-bit pointer (access up
to 128 data locations)
8-bit pointer (access up
to 256 data locations)
GATE_
NAME
PSIZE
TSIZE
POFF
LUT POINTER SIZE
SOT
BIT
INT
=
DATA
calculation:
RESET
STATE
000000 POFF bits.
000
000
1
00
00
+
⎛
⎜
⎝
ADD
PTR
Interpolation degree select bits.
See Table 5b.
LUT pointer size bit. See Table
5a.
LUT size bit. See Table 5c.
Start of table address bits. See
Table 5d.
2
−
−
ADD
- 128 to + 124 ( i n step s of 4)
POFF OFFSET RANGE*
ADD
-64 to +62 (in steps of 2)
1
1
FUNCTION
⎞
⎟
⎠
x DATA
-32 to +31
-32 to +31
(
2
−
DATA
1
)
where PTR is the calculated LUT pointer value with
fractional bits, ADD1 and ADD2 are the two LUT
addresses closest to the value of PTR, and DATA1 and
DATA2 are the LUT data values stored at ADD1 and
ADD2.
POFF = 001000 (offset of +8).
INT = 00 (no interpolation/LUT pointer does not have
any fractional bits).
PSIZE = 00 (5-bit LUT pointer not including any frac-
tional bits).
TSIZE = 001 (LUT has 32 data locations).
SOT = 010 (LUT starts at EEPROM address 40 hex).
Table 5b. Fractional Bits Added to LUT
Pointer for Linear Interpolation
Table 5c. Selectable LUT Sizes
Table 5d. Selectable LUT Starting
Addresses
INT
00
01
10
11
TSIZE
SOT
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
LUT Pointer Example 1 (No Interpolation)
NUMBER OF FRACTIONAL BITS ADDED TO
Unused
Table size of 32 data locations
Table size of 64 data locations
Table size of 96 data locations
Table size of 128 data locations
Table size of 160 data locations
Table size of 192 data locations
Unused
STARTING ADDRESS IN EEPROM (HEX)
1 ≥ 1:2 interpolation
2 ≥ 1:4 interpolation
3 ≥ 1:8 interpolation
LUT POINTER
LUT SIZE
Unused
Unused
0xC0
0
0x40
0x60
0x80
0xA0
0xE0