MAX11008BETM+ Maxim Integrated Products, MAX11008BETM+ Datasheet - Page 51

• Manufacturer Part Number: MAX11008BETM+
• Description: RF Wireless Misc IC CTLR LDMOS BIAS DUAL
• Manufacturer: Maxim Integrated Products

Specifications of MAX11008BETM+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Configure the hardware alarm functions with bits
D[10:0] in the Alarm Hardware Configuration register
(see Table 14). Bits D[15:11] are don’t-care bits.
Set AVGMON to 1 to write ADC averages to the FIFO.
The tracking average has a unique channel tag and is
distinguishable from the raw sample. The average mon-
itoring is automatically suspended when in LUT stream-
ing and message modes. ADCMON and AVGMON
cannot be active at the same time.
Set INTEMP2 to 1 to configure the channel 2 tempera-
ture alarm to monitor the internal temperature sensor
readings rather than the channel 2 external tempera-
ture sensor. The status of the alarm is indicated by the
channel 2 temperature flags in the flag register. The
current-sense alarm for channel 2 is no longer available
in this mode.
Set ALMCOMP to 1 to configure the ALARM output for
comparator mode, and set ALMCOMP to 0 to configure
the ALARM output for interrupt mode. See the ALARM-
Output Modes section for a detailed description of
each type of ALARM output mode.
Program ALMHYST[1:0] to set the amount of hysteresis
that is applied to the alarm thresholds when the alarm
function is configured for window mode (see Table
14a). See the Window Mode section for a detailed
description of how the hysteresis is applied.
Set ALMCLMP[1:0] to control the methods to clamp the
GATE_ to AGND when an alarm is triggered (see Table
14b).
Set ALMPOL to 1 to configure the ALARM output to be
active-low, and set ALMPOL to 0 to configure the
ALARM output to be active-high.
Set ALMOPEN to 1 to configure the ALARM output for
an open-drain output (pullup resistor required), and set
ALMOPEN to 0 for a push-pull output.
The VSET registers set the nominal GATE_ output code
without any temperature or APC compensation (see
Table 15). This value is input into the V
tion (see the V
to this register triggers a V
result of that calculation is loaded into either the DAC_
input register or the DAC_ input and output registers
depending on the state of the LDAC_ bit in the Software
Configuration register. Bits D[15:12] are don’t-care bits.
VSET Registers (VSET1, VSET2) (Read/Write)
Alarm Hardware Configuration Register
GATE
______________________________________________________________________________________
_ Output Equation section). Writing
GATE_
(ALMHCFIG) (Read/Write)
Dual RF LDMOS Bias Controller with
calculation, and the
GATE_
calcula-
The T_HIST_APC registers are dual-functionality regis-
ters. The function of the T_HIST_APC registers
depends upon the value of APCSRC_[1:0] bits in the
Software Configuration register (see Table 13). If
APCSRC_[1:0] = 00, the T_HIST_APC registers hold the
APC parameter and the temperature hysteresis controls
(see Table 16a). If APCSRC_[1:0] = 10 or 11, the
T_HIST_APC registers hold the APC averaging and
hysteresis controls as well as temperature hysteresis
controls (see Table 16b).
The T_HIST register bits T_HIST[3:0] set the temperature
hysteresis limits for both channel 1 and channel 2 V
calculations. After a new temperature sample, the device
proceeds in performing a V
ple differs from the previous sample used for a V
calculation by an amount greater than the hysteresis set-
ting (see Table 16c). Set APCCOMP_ and TCOMP_ to 0
before T_HIST is changed.
The APC register bits (APC[11:0]) set the value that is
converted into the LUT pointer value, which is subse-
quently used to retrieve the APC LUT value for V
calculations (see Table 16a). This value is used only
when APCSRC_1 is set to 0 in the Software
Configuration register. Writing to this register triggers a
V
APCCOMP_ is set to 1 in the Software Configuration
register.
The A_AVGCTL bit controls the averaging equation
for APC while the device is in tracking mode. The
A_AVGCTL bit only affects the tracking mode of the
averaging. The bit does not affect the acquirement
of the initial average. The initial average always
requires 16 samples to generate a valid average. Set
A_AVGCLT to 0 for average plus 1/16 of the difference.
Set A_AVGCTL to 1 for average plus 1/4 of the differ-
ence (see Table 16c).
Program A_LIMIT[2:0] to enable and set the difference
limiter for APC averaging. The APC average must be
enabled for the contents of the A_LIMIT[2:0] field to
have any effect on the measured data. The
A_LIMIT[2:0] field only affects the tracking mode of the
average function. When tracking the average, the dif-
ference between the current average and the new sam-
ple is calculated. The difference is then added into the
average according to the A_AVGCTL bit, but before
being added the difference is limited according to the
A_LIMIT[2:0] field (see Table 16d).
GATE_
T_HIST_APC Registers (HIST_APC1, HIST_APC2)
Nonvolatile Memory
calculation when APCSRC_1 is set to 0 and
GATE_
calculation if that sam-
(Read/Write)
GATE_
GATE_
GATE_
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