723624L12PF Integrated Device Technology (Idt), 723624L12PF Datasheet - Page 33

• Manufacturer Part Number: 723624L12PF
• Description: FIFO Mem Sync Dual Bi-Dir 256 x 36 x 2 128-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 723624L12PF

• Package: 128TQFP
• Configuration: Dual
• Bus Directional: Bi-Directional
• Density: 18 Kb
• Organization: 256x36x2
• Data Bus Width: 36 Bit
• Timing Type: Synchronous
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C

NOTE:
1. If Port B is configured for word size, data can be written to the Mail2 Register using B0-B17 (B18-B35 are don’t care inputs). In this first case A0-A17 will have valid data
(A18-A35 will be indeterminate). If Port B is configured for byte size, data can be written to the Mail2 Register using B0-B8 (B9-B35 are don’t care inputs). In this second
case, A0-A8 will have valid data (A9-A35 will be indeterminate).
IDT723624/723634/723644 CMOS SyncBiFIFO™ WITH BUS-MATCHING
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
B0-B35
A0-A35
MBF2
W/RA
W/RB
CLKA
CLKB
MBA
MBB
CSA
CSB
ENB
ENA
Figure 28. Timing for Mail2 Register and MBF2
t
t
t
t
ENS2
ENS1
ENS1
ENS2
t
FIFO2 Output Register
EN
t
DS
W1
t
MDV
t
t
t
t
t
ENH
ENH
DH
ENH
ENH
t
PMF
t
PMR
33
MBF2
MBF2
MBF2
MBF2 Flag (IDT Standard and FWFT Modes)
W1 (Remains valid in Mail 2 Register after read)
t
ENS2
COMMERCIAL TEMPERATURE RANGE
t
ENH
t
PMF
t
DIS
3270 drw30