MSC8144ADS Freescale, MSC8144ADS Datasheet - Page 28

• Manufacturer Part Number: MSC8144ADS
• Manufacturer: Freescale

Specifications of MSC8144ADS

• Lead Free Status / RoHS Status: Compliant

ADS Functional Description
5-4
Note: The Host TSEC2 port configured as RGMII is connected to the Quad 88E1145 phy port 0.
125
MHz
GE1_SGMII_RX
GE1_SGMII_TX
GE2_SGMII_TX
GE2_SGMII_RX
MSC8144
GE1_RXD[3–0]
GE2_RXD[3–0]
GE1_Rx_CLK
GE1_TX_CLK
GE1_TD[3–0]
GE2_TD[3–0]
To AMC
GE1_RX_DV
GE2_RX_ER
GE2_TX_EN
GE1_TX_ER
GE1_TX_EN
GE2_RX_DV
GE2_RCLK
59,60
62,63
68,69
65,66
GE2_TCK
Distr.
Clk
Lane 2
Lane 3
Figure 5-2. GETH Interconnection Diagram
MSC8144ADS MSC8144, Rev. 0
diff
RGMII[0,3]_RD[3–0]
RGMII[0,3]_TxClk
RGMII[0,3]_RxClk
RGMII[0,3]_Rx_Ctrl
RGMII[0,3]_Tx_Ctrl
RGMII[0,3]_TD[3–0]
port 0
TXD[3–0]
Clk
RX_CLK
TX_P2
RX_P2
TX_P3
RX_P3
XTAL_IN
GTX_CLK
TX_EN
RX_DV
RXD[3–0]
XTAL1
MDX_Addr = 0x13,
VSC7380VU
88E1145 p.p. 1,2
6-port SGMII switch
port 5,7
88E1145 p.3
88E6152
MDX_Addr = 0x10
Addr = 0
port3
0x12
MDX_Addr = 4
1
2
MDI[0–3]N
MDI[0–3]P
S_OUT
RX_P9
RX_P7
RX_P0
TX_P9
TX_P7
TX_P0
S_IN
TSEC2_GTX_CLK
TSEC2_RX_CLK
TSEC2_TX_EN
TSEC2_RX_DV
TSEC2_TXD[3–0]
EC_GTX_CLK125
TSEC2_RXD[3–0]
diff
MPC8560 (TSEC1)
Combo
RJ45
Combo
Combo
RJ45
RJ45
Freescale Semiconductor
SerDes
SerDes
To AMC
11,12
14,15
29,30
32,33